MC68HC908AS32A Datasheet, PDF (45/280 Pages) Freescale Semiconductor, Inc – Microcontrollers

Electrically Erasable Programmable Read-Only Memory (EEPROM)
the written location. (Reading an EEPROM location returns the latched data
and causes the read address to be latched).
C. The EEPGM bit cannot be set if the EELAT bit is cleared or a non-valid
EEPROM address is latched. This is to ensure proper programming
sequence. Once EEPGM is set, do not read any EEPROM locations;
otherwise, the current program cycle will be unsuccessful. When EEPGM
is set, the on-board programming sequence will be activated.
D. The delay time for the EEPGM bit to be cleared in AUTO mode is less
than t_EEBYTE /t_EEBLOCK/t_EEBULK. However, on other MCUs, this delay time
may be different. For forward compatibility, software should not make any
dependency on this delay time.
E. Any attempt to clear both EEPGM and EELAT bits with a single
instruction will only clear EEPGM. This is to allow time for removal of high
voltage from the EEPROM array.
2.8.2 EEPROM Register Descriptions
Four I/O registers and three nonvolatile registers control program, erase, and options of the EEPROM
array.
2.8.2.1 EEPROM Control Register
This read/write register controls programming/erasing of the array.
Address: $FE1D
Bit 7
Read:
UNUSED
Write:
Reset: 0
6
5
0
EEOFF
0
0
= Unimplemented
4
3
EERAS1 EERAS0
0
0
2
EELAT
0
1
AUTO
0
Bit 0
EEPGM
0
Figure 2-4. EEPROM Control Register (EECR)
Bit 7— Unused Bit
This read/write bit is software programmable but has no functionality.
EEOFF — EEPROM Power Down
This read/write bit disables the EEPROM module for lower power consumption. Any attempts to
access the array will give unpredictable results. Reset clears this bit.
1 = Disable EEPROM array
0 = Enable EEPROM array
EERAS1 and EERAS0 — Erase/Program Mode Select Bits
These read/write bits set the erase modes. Reset clears these bits.
MC68HC908AS32A Data Sheet, Rev. 2.0
Freescale Semiconductor
45