MC68HC908AS32A Datasheet, PDF (49/280 Pages) Freescale Semiconductor, Inc – Microcontrollers

Electrically Erasable Programmable Read-Only Memory (EEPROM)
EEDIV[10:0] — EEPROM Timebase Prescaler
These prescaler bits store the value of EEDIV which is used as the divisor to derive a timebase of 35
µs from the selected reference clock source (CGMXCLK or bus block in the CONFIG2 register) for the
EEPROM related internal timer and circuits. EEDIV[10:0] bits are readable at any time. They are
writable when EELAT = 0 and EEDIVSECD = 1.
The EEDIV value is calculated by the following formula:
EEDIV= INT[Reference Frequency(Hz) x 35 x10^–6 +0.5]
Where the result inside the bracket is rounded down to the nearest integer value
For example, if the reference frequency is 4.9152 MHz, the EEDIV value is 172
NOTE
Programming/erasing the EEPROM with an improper EEDIV value may
result in data lost and reduce endurance of the EEPROM device.
2.8.2.5 EEPROM Timebase Divider Nonvolatile Register
The 16-bit EEPROM timebase divider nonvolatile register consists of two 8-bit registers: EEDIVHNVR
and EEDIVLNVR. The contents of these two registers are respectively loaded into the EEPROM timebase
divider registers, EEDIVH and EEDIVL, after a reset. These two registers are erased and programmed in
the same way as an EEPROM byte.
Address: $FE10
Bit 7
6
5
4
3
2
1
Bit 0
Read: _EEDIVS-
Write: ^ECD
R
R
R
R
EEDIV10 EEDIV9 EEDIV8
Reset:
Unaffected by reset; $FF when blank
R
= Reserved
Figure 2-9. EEPROM Divider Nonvolatile Register High (EEDIVHNVR))
Address:
Read:
Write:
Reset:
$FE11
Bit 7
EEDIV7
6
5
4
3
2
1
Bit 0
EEDIV6 EEDIV5 EEDIV4 EEDIV3 EEDIV2 EEDIV1 EEDIV0
Unaffected by reset; $FF when blank
Figure 2-10. EEPROM Divider Nonvolatile Register Low (EEDIVLNVR)
These two registers are protected from erase and program operations if EEDIVSECD is set to 1 in
EEDIVH (see 2.8.2.4 EEPROM Timebase Divider Register) or programmed to a 1 in the EEDIVHNVR.
NOTE
Once EEDIVSECD in the EEDIVHNVR is programmed to 0 and after a
system reset, the EEDIV security feature is permanently enabled because
the EEDIVSECD bit in the EEDIVH is always loaded with 0s thereafter.
Once this security feature is armed, erase and program mode are disabled
for EEDIVHNVR and EEDIVLNVR. Modifications to the EEDIVH and
EEDIVL registers are also disabled. Therefore, care should be taken before
programming a value into the EEDIVHNVR.
MC68HC908AS32A Data Sheet, Rev. 2.0
Freescale Semiconductor
49