MC68HC908AS32A Datasheet, PDF (151/280 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 13
Input/Output Ports
13.1 Introduction
Forty bidirectional input/output (I/O) pins form six parallel ports. All I/O pins are programmable as inputs
or outputs.
NOTE
Connect any unused I/O pins to an appropriate logic level, either V_DD or
V_SS. Although the I/O ports do not require termination for proper operation,
termination reduces excess current consumption and the possibility of
electrostatic damage.
13.2 Port A
Port A is an 8-bit general-purpose bidirectional I/O port.
13.2.1 Port A Data Register
The port A data register contains a data latch for each of the eight port A pins.
Address: $0000
Bit 7
Read:
PTA7
Write:
Reset:
6
PTA6
5
PTA5
4
3
PTA4
PTA3
Unaffected by Reset
2
PTA2
1
PTA1
Bit 0
PTA0
Figure 13-1. Port A Data Register (PTA)
PTA[7:0] — Port A Data Bits
These read/write bits are software programmable. Data direction of each port A pin is under the control
of the corresponding bit in data direction register A. Reset has no effect on port A data.
13.2.2 Data Direction Register A
Data direction register A determines whether each port A pin is an input or an output. Writing a 1 to a
DDRA bit enables the output buffer for the corresponding port A pin; a 0 disables the output buffer.
Address: $0004
Bit 7
6
5
4
3
2
1
Read:
Write:
Reset:
DDRA7
0
DDRA6
0
DDRA5
0
DDRA4
0
DDRA3
0
DDRA2
0
DDRA1
0
Figure 13-2. Data Direction Register A (DDRA)
Bit 0
DDRA0
0
MC68HC908AS32A Data Sheet, Rev. 2.0
Freescale Semiconductor
151