MC68HC908AS32A Datasheet, PDF (191/280 Pages) Freescale Semiconductor, Inc – Microcontrollers

STOP/WAIT
CONTROL
SIM
COUNTER
÷2
CLOCK
CONTROL
CLOCK GENERATORS
SIM Bus Clock Control and Generation
MODULE STOP
MODULE WAIT
CPU STOP (FROM CPU)
CPU WAIT (FROM CPU)
SIMOSCEN (TO CGM)
COP CLOCK
CGMXCLK (FROM CGM)
CGMOUT (FROM CGM)
INTERNAL CLOCKS
RESET
PIN LOGIC
POR CONTROL
RESET PIN CONTROL
SIM RESET STATUS REGISTER
MASTER
RESET
CONTROL
RESET
LVI (FROM LVI MODULE)
ILLEGAL OPCODE (FROM CPU)
ILLEGAL ADDRESS (FROM ADDRESS
MAP DECODERS)
COP (FROM COP MODULE)
INTERRUPT CONTROL
AND PRIORITY DECODE
INTERRUPT SOURCES
CPU INTERFACE
Figure 15-2. SIM Block Diagram
OSC1
CLOCK
SELECT
÷2
CGMVCLK
CIRCUIT
PLL
BCS
PTC3
MONITOR MODE
USER MODE
CGM
CGMXCLK
A
CGMOUT
B _S*
*When S = 1,
CGMOUT = B
Figure 15-3. CGM Clock Signals
SIM COUNTER
÷2
BUS CLOCK
GENERATORS
SIM
MC68HC908AS32A Data Sheet, Rev. 2.0
Freescale Semiconductor
191