MC68HC908AS32A Datasheet, PDF (34/280 Pages) Freescale Semiconductor, Inc – Microcontrollers

Memory
Addr.
$0020
$0021
Register Name
Bit 7
6
5
4
3
TIM Status and Control ^{Read: TOF}
TOIE TSTOP
0
0
Register (TSC) Write: 0
TRST
See page 237. _Reset:
0
0
1
0
0
Reserved
R
R
R
R
R
2
1
Bit 0
PS2
PS1
PS0
0
0
0
R
R
R
$0022
$0023
$0024
$0025
$0026
$0027
$0028
$0029
$002A
$002B
$002C
TIM Counter Register High ^Read:
(TCNTH) Write:
See page 238. _Reset:
TIM Counter Register Low ^Read:
(TCNTL) Write:
See page 238. _Reset:
TIM Modulo Register High ^Read:
(TMODH) Write:
See page 239. _Reset:
TIM Modulo Register Low ^Read:
(TMODL) Write:
See page 239. _Reset:
TIM Channel 0 Status and ^Read:
Control Register (TSC0) Write:
See page 240. _Reset:
TIM Channel 0 Register High ^Read:
(TCH0H) Write:
See page 243. _Reset:
TIM Channel 0 Register Low ^Read:
(TCH0L) Write:
See page 243. _Reset:
TIM Channel 1 Status and ^Read:
Control Register (TSC1) Write:
See page 240. _Reset:
TIM Channel 1 Register High ^Read:
(TCH1H) Write:
See page 243. _Reset:
TIM Channel 1 Register Low ^Read:
(TCH1L) Write:
See page 243. _Reset:
TIM Channel 2 Status and ^Read:
Control Register (TSC2) Write:
See page 240. _Reset:
Bit 15
0
Bit 7
0
Bit 15
1
Bit 7
1
CH0F
0
0
Bit 15
Bit 7
CH1F
0
0
Bit 15
Bit 7
CH2F
0
0
14
13
12
11
10
9
0
0
0
0
0
0
6
5
4
3
2
1
0
14
1
6
1
CH0IE
0
14
6
0
0
0
0
13
12
11
10
1
1
1
1
5
4
3
2
1
1
1
1
MS0B MS0A ELS0B ELS0A
0
0
0
0
13
12
11
10
Indeterminate after reset
5
4
3
2
0
9
1
1
1
TOV0
0
9
1
0
CH1IE
MS1A ELS1B ELS1A TOV1
0
0
0
0
0
0
14
13
12
11
10
9
Indeterminate after reset
6
5
4
3
2
1
Indeterminate after reset
CH2IE MS2B MS2A ELS2B ELS2A TOV2
0
0
= Unimplemented
0
0
0
0
R
= Reserved U = Unaffected
Figure 2-2. I/O Data, Status and Control Registers (Sheet 4 of 6)
Bit 8
0
Bit 0
0
Bit 8
1
Bit 0
1
CH0MAX
0
Bit 8
Bit 0
CH1MAX
0
Bit 8
Bit 0
CH2MAX
0
MC68HC908AS32A Data Sheet, Rev. 2.0
34
Freescale Semiconductor