MC68HC908AS32A Datasheet, PDF (257/280 Pages) Freescale Semiconductor, Inc – Microcontrollers

Monitor Module (MON)
modify the stacked CPU registers to prepare to run the host program. The READSP command returns
the incremented stack pointer value, SP + 1. The high and low bytes of the program counter are at
addresses SP + 5 and SP + 6.
HIGH BYTE OF INDEX REGISTER
CONDITION CODE REGISTER
ACCUMULATOR
LOW BYTE OF INDEX REGISTER
HIGH BYTE OF PROGRAM COUNTER
LOW BYTE OF PROGRAM COUNTER
SP
SP + 1
SP + 2
SP + 3
SP + 4
SP + 5
SP + 6
SP + 7
Figure 18-12. Stack Pointer at Monitor Mode Entry
18.3.2 Security
A security feature discourages unauthorized reading of FLASH locations while in monitor mode. The host
can bypass the security feature at monitor mode entry by sending eight security bytes that match the
bytes at locations $FFF6–$FFFD. Locations $FFF6–$FFFD contain user-defined data.
NOTE
Do not leave locations $FFF6–$FFFD blank. For security reasons, program
locations $FFF6–$FFFD even if they are not used for vectors.
During monitor mode entry, the MCU waits after the power-on reset for the host to send the eight security
bytes on pin PTA0. If the received bytes match those at locations $FFF6–$FFFD, the host bypasses the
security feature and can read all FLASH locations and execute code from FLASH. Security remains
bypassed until a power-on reset occurs. If the reset was not a power-on reset, security remains bypassed
and security code entry is not required. See Figure 18-13.
V_DD
4096 + 32 CGMXCLK CYCLES
RST
FROM HOST
PA0
4
FROM MCU
1
3
1
1
2
Notes:
1 = Echo delay, approximately 2 bit times
2 = Data return delay, approximately 2 bit times
3 = Wait 1 bit time before sending next byte
4 = Wait until clock is stable and monitor runs
Figure 18-13. Monitor Mode Entry Timing
3
1
MC68HC908AS32A Data Sheet, Rev. 2.0
Freescale Semiconductor
257