MC9S12NE64V1 Datasheet, PDF (547/554 Pages) Freescale Semiconductor, Inc – MC9S12NE64V1 Data Sheet

PCB Design Recommendation
• All termination resistors should be near to the driving source. The MCU is the driving source for
PHY_TXP and PHY_TXN pins. The high-speed LAN magnetics isolation module is the driving
source for PHY_RXP and PHY_RXN pins.
• 4-layer PCBs recommended to provide better heat dissipation
B.2.2.1 High-Speed LAN Magnetics Isolation Module Requirements
The MC9S12NE64 requires a 1:1 ratio for the high-speed LAN magnetics isolation module for both the
receive and the transmit signals. Because the MC9S12NE64 does not implement Auto-MDIX, an
Auto-MDIX capable high-speed LAN magnetics isolation module is not required. A high-speed LAN
magnetics isolation module with improved return loss characteristics is recommended to avoid Ethernet
return loss issues.
B.2.2.2 80-Pin Package Exposed Flag
The 80-pin TQFP-EP package has an exposed flag for heat dissipation and requires special PCB layout to
accommodate the flag. There are two ways to accommodate the flag:
• Have a hatched pattern in the solder mask
• Use small copper areas under the flag
The requirement is to have about 50% of the flag soldered to the PC board.
MC9S12NE64 Data Sheet, Rev. 1.1
Freescale Semiconductor
547