MC9S12NE64V1 Datasheet, PDF (129/554 Pages) Freescale Semiconductor, Inc – MC9S12NE64V1 Data Sheet

Memory Map and Register Descriptions
3.3.2.5.5 Pull Device Enable Register (PERJ)
Module Base + $24
Bit 7
6
5
Read:
Write:
PERJ7
PERJ6
0
Reset:
1
1
—
4
3
0
PERJ3
—
0
2
PERJ2
0
1
PERJ1
0
Bit 0
PERJ0
0
= Reserved or unimplemented
Figure 3-35. Port J Pull Device Enable Register (PERJ)
Read:Anytime.
Write:Anytime.
This register configures whether a pull-up or a pull-down device is activated, if the port is used as input.
This bit has no effect if the port is used as output. Out of reset pull-up device is enabled for bits PJ[7:6]
and disabled for bits PJ[3:0].
PERJ[7:6][3:0] — Pull Device Enable Port J
1 = Either a pull-up or pull-down device is enabled.
0 = Pull-up or pull-down device is disabled.
3.3.2.5.6 Polarity Select Register (PPSJ)
Module Base + $25
Bit 7
6
5
4
Read:
0
0
Write: ^PPSJ7
PPSJ6
Reset:
0
0
—
—
3
PPSJ3
0
2
PPSJ2
0
1
PPSJ1
0
Bit 0
PPSJ0
0
= Reserved or unimplemented
Figure 3-36. Port J Polarity Select Register (PPSJ)
Read:Anytime.
Write:Anytime.
This register serves a dual purpose by selecting the polarity of the active interrupt edge as well as selecting
a pull-up or pull-down device if enabled.
PPSJ[7:6][3:0] — Polarity Select Port J
1 = Rising edge on the associated port J pin sets the associated flag bit in the PIFJ register. A
pull-down device is connected to the associated port J pin, if enabled by the associated bit in
register PERJ and if the port is used as input.
0 = Falling edge on the associated port J pin sets the associated flag bit in the PIFJ register. A pull-up
device is connected to the associated port J pin, if enabled by the associated bit in register PERJ
and if the port is used as input.
MC9S12NE64 Data Sheet, Rev. 1.1
Freescale Semiconductor
129