MC9S12NE64V1 Datasheet, PDF (232/554 Pages) Freescale Semiconductor, Inc – MC9S12NE64V1 Data Sheet

Chapter 8 Serial Communication Interface (SCIV3)
8.2 External Signal Descriptions
The SCI module has a total of two external pins.
8.2.1 TXD — SCI Transmit Pin
The TXD pin transmits SCI (standard or infrared) data. It will idle high in either mode and is high
impedance anytime the transmitter is disabled.
8.2.2 RXD — SCI Receive Pin
The RXD pin receives SCI (standard or infrared) data. An idle line is detected as a line high. This input is
ignored when the receiver is disabled and should be terminated to a known voltage.
8.3 Memory Map and Register Definition
This subsection provides a detailed description of all the SCI registers.
8.3.1 Module Memory Map
The memory map for the SCI module is given in Figure 8-2. The address listed for each register is the
address offset. The total address for each register is the sum of the base address for the SCI module and
the address offset for each register.
8.3.2 Register Descriptions
This subsection consists of register descriptions in address order. Each description includes a standard
register diagram with an associated figure number. Writes to reserved register locations do not have any
effect and reads of these locations return a 0. Details of register bit and field function follow the register
diagrams, in bit order.
Register
Name
SCIBDH
SCIBDL
SCICR1
Bit 7
6
5
4
3
R
IREN
W
TNP1
TNP0 SBR12 SBR11
R
SBR7
W
SBR6
SBR5
SBR4
SBR3
R
LOOPS SCISWAI RSRC
M
WAKE
W
= Unimplemented or Reserved
Figure 8-2. SCI Registers Summary
2
SBR10
SBR2
ILT
1
SBR9
SBR1
PE
Bit 0
SBR8
SBR0
PT
MC9S12NE64 Data Sheet, Rev. 1.1
232
Freescale Semiconductor