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MC9S12NE64V1 Datasheet, PDF (135/554 Pages) Freescale Semiconductor, Inc – MC9S12NE64V1 Data Sheet | |||
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Functional Description
This register deï¬nes whether the pin is used as an input or an output.
If a peripheral module controls the pin the contents of the data direction register is ignored (Figure 3-46).
PTI
0
1
PT
0
1
PAD
DDR
0
1
data out
Module output enable
module enable
Figure 3-46. Illustration of I/O Pin Functionality
3.4.3 Reduced Drive Register
If the port is used as an output the register allows the conï¬guration of the drive strength.
3.4.4 Pull Device Enable Register
This register turns on a pull-up or pull-down device.
It becomes only active if the pin is used as an input or as a wired-or output.
3.4.5 Polarity Select Register
This register selects either a pull-up or pull-down device if enabled.
It becomes only active if the pin is used as an input or wired-or output. A pull-up device can also be
activated if the pin is used as a wired-or output.
3.4.6 Port T
This port is associated with the standard Timer.
In all modes, port T pins PT[7:4] can be used for either general-purpose I/O or standard timer I/O.
During reset, port T pins are conï¬gured as high-impedance inputs.
MC9S12NE64 Data Sheet, Rev. 1.1
Freescale Semiconductor
135
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