MC9S12NE64V1 Datasheet, PDF (185/554 Pages) Freescale Semiconductor, Inc – MC9S12NE64V1 Data Sheet

6.3 Memory Map and Register Definition
This section provides a detailed description of all memory and registers.
Memory Map and Register Definition
6.3.1 Module Memory Map
The memory map for the TIM16B4CV1 module is given below in Table 6-1. The address listed for each
register is the address offset. The total address for each register is the sum of the base address for the
TIM16B4CV1 module and the address offset for each register.
Table 6-1. TIM16B4CV1 Memory Map
Address Offset
Use
0x0000
0x0001
Timer Input Capture/Output Compare Select (TIOS)
Timer Compare Force Register (CFORC)
0x0002
0x0003
0x0004
0x0005
0x0006
Output Compare 7 Mask Register (OC7M)
Output Compare 7 Data Register (OC7D)
Timer Count Register (TCNT(hi))
Timer Count Register (TCNT(lo))
Timer System Control Register1 (TSCR1)
0x0007
0x0008
0x0009
0x000A
0x000B
Timer Toggle Overflow Register (TTOV)
Timer Control Register1 (TCTL1)
Reserved
Timer Control Register3 (TCTL3)
Reserved
0x000C
0x000D
0x000E
0x000F
0x0010 - 0x0017
Timer Interrupt Enable Register (TIE)
Timer System Control Register2 (TSCR2)
Main Timer Interrupt Flag1 (TFLG1)
Main Timer Interrupt Flag2 (TFLG2)
Reserved
0x0018
0x0019
0x001A
0x001B
0x001C
Timer Input Capture/Output Compare Register4 (TC4(hi))
Timer Input Capture/Output Compare Register 4 (TC4(lo))
Timer Input Capture/Output Compare Register 5 (TC5(hi))
Timer Input Capture/Output Compare Register 5 (TC5(lo))
Timer Input Capture/Output Compare Register 6 (TC6(hi))
0x001D
Timer Input Capture/Output Compare Register 6 (TC6(lo))
0x001E
Timer Input Capture/Output Compare Register 7 (TC7(hi))
0x001F
Timer Input Capture/Output Compare Register 7 (TC7(lo))
0x0020
16-Bit Pulse Accumulator Control Register (PACTL)
0x0021
Pulse Accumulator Flag Register (PAFLG)
0x0022
Pulse Accumulator Count Register (PACNT(hi))
0x0023
Pulse Accumulator Count Register (PACNT(lo))
0x0024 – 0x002C Reserved
0x002D
Timer Test Register (TIMTST)
0x002E – 0x002F Reserved
1 _{Always read 0x0000.}
Access
R/W
R/W¹
R/W
R/W
R/W²
R/W²
R/W
R/W
R/W
—³
R/W
—³
R/W
R/W
R/W
R/W
—³
R/W⁴
R/W⁴
R/W⁴
R/W⁴
R/W⁴
R/W⁴
R/W⁴
R/W⁴
R/W
R/W
R/W
R/W
—³
R/W²
—³
MC9S12NE64 Data Sheet, Rev. 1.1
Freescale Semiconductor
185