MC9S12NE64V1 Datasheet, PDF (105/554 Pages) Freescale Semiconductor, Inc – MC9S12NE64V1 Data Sheet

Chapter 3
Port Integration Module (PIM9NE64V1)
3.1 Introduction
Figure 3-1 is a block diagram of the PIM_9NE64.
The port integration module establishes the interface between the peripheral modules and the I/O pins for
all ports.
• This section covers:
• port A, B, E, and K related to the core logic and multiplexed bus interface
• port T connected to the timer module
• port S associated with 2 SCI and 1 SPI modules
• port G, H, and J connected to EMAC module, each of them also can be used as an external interrupt
source.
• port L connected to EPHY module
Each I/O pin can be configured by several registers: Input/output selection, drive strength reduction, enable
and select of pull resistors, interrupt enable and status flags.
The implementation of the port integration module is device dependent.
MC9S12NE64 Data Sheet, Rev. 1.1
Freescale Semiconductor
105