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| MC9S12NE64V1 Datasheet, PDF (380/554 Pages) Freescale Semiconductor, Inc – MC9S12NE64V1 Data Sheet | |||
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Chapter 13 Penta Output Voltage Regulator (VREGPHYV1)
13.1.4 Block Diagram
Figure 13-1 shows the function principle of VREG_PHY by means of a block diagram. The
regulator core REG consists of ï¬le parallel subblocks, providing ï¬ve independent output voltages.
Figure 13-1. VREG_PHY - Block Diagram
VDDRAUX3
VDDRAUX2
VDDRAUX1
VDDR
REG5
REG4
REG3
REG2
VDDAUX3
VSSAUX3
VDDAUX2
VSSAUX2
VDDAUX1
VSSAUX1
VDDPLL
VSSPLL
VDDA
VSSA
REG1
VDD
LVR
LVR POR
POR
VSS
VREGEN
CTRL
LVI
REG: Regulator Core
CTRL: Regulator Control
LVR: Low Voltage Reset
POR: Power-on Reset
PIN
MC9S12NE64 Data Sheet, Rev. 1.1
380
Freescale Semiconductor
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