MC9S12NE64V1 Datasheet, PDF (41/554 Pages) Freescale Semiconductor, Inc – MC9S12NE64V1 Data Sheet

Signal Description
1.2.1 Device Pinout
The MC9S12NE64 is available in a 112-pin low-profile quad flat pack (LQFP) and in an 80-pin quad flat
pack (TQFP-EP). Most pins perform two or more functions, as described in this section. Figure 1-3 and
Figure 1-4 show the pin assignments.
1.2.1.1 112-Pin LQFP
MII_TXER/KWH6/PH6 1
MII_TXEN/KWH5/PH5 2
MII_TXCLK/KWH4/PH4 3
MII_TXD3/KWH3/PH3 4
MII_TXD2/KWH2/PH2 5
MII_TXD1/KWH1/PH1 6
MII_TXD0/KWH0/PH0 7
MII_MDC/KWJ0/PJ0 8
MII_MDIO/KWJ1/PJ1 9
ADDR0/DATA0/PB0 10
ADDR1/DATA1/PB1 11
ADDR2/DATA2/PB2 12
ADDR3/DATA3/PB3 13
VDDX1 14
VSSX1 15
ADDR4/DATA4/PB4 16
ADDR5/DATA5/PB5 17
ADDR6/DATA6/PB6 18
ADDR7/DATA7/PB7 19
MII_CRS/KWJ2/PJ2 20
MII_COL/KWJ3/PJ3 21
MII_RXD0/KWG0/PG0 22
MII_RXD1/KWG1/PG1 23
MII_RXD2/KWG2/PG2 24
MII_RXD3/KWG3/PG3 25
MII_RXCLK/KWG4/PG4 26
MII_RXDV/KWG5/PG5 27
MII_RXER/KWG6/PG6 28
112-PIN LQFP
Signals shown in Bold are not available on the 80-pin package
84 _PL0/ACTLED
83 _PL1/LNKLED
82 _VDDR
81 _PL2/SPDLED
80 _{PA7/ADDR15/DATA15}
79 _{PA6/ADDR14/DATA14}
78 _{PA5/ADDR13/DATA13}
77 _{PA4/ADDR12/DATA12}
76 _{PHY_VSSRX}
75 _{PHY_VDDRX}
74 _{PHY_RXN}
73 _{PHY_RXP}
72 _{PHY_VSSTX}
71 _{PHY_TXN}
70 _{PHY_TXP}
69 _{PHY_VDDTX}
68 _{PHY_VDDA}
67 _{PHY_VSSA}
66 _{PHY_RBIAS}
65 _VDD2
64 _VSS2
63 _{PA3/ADDR11/DATA11}
62 _{PA2/ADDR10/DATA10}
61 _{PA1/ADDR9/DATA9}
60 _{PA0/ADDR8/DATA8}
59 _PL3/DUPLED
58 _PL4/COLLED
57 _{BKGD/MODC/TAGHI}
Figure 1-3. Pin Assignments in 112-Pin LQFP for MC9S12NE64
MC9S12NE64 Data Sheet, Rev 1.0
Freescale Semiconductor
41