MC9S12NE64V1 Datasheet, PDF (351/554 Pages) Freescale Semiconductor, Inc – MC9S12NE64V1 Data Sheet

Memory Map and Register Descriptions
12.2.13 ACTLEC — Activity LED
Flashes when data is received by the device if EPHYCTL0 LEDEN bit is set.
12.3 Memory Map and Register Descriptions
This section provides a detailed description of all registers accessible in the EPHY.
12.3.1 Module Memory Map
Table 12-1 gives an overview of all registers in the EPHY memory map. The EPHY occupies 48 bytes in
the memory space. The register address results from the addition of base address and address offset. The
base address is determined at the MCU level. The address offset is defined at the module level.
Table 12-1. EPHY Module Memory Map
Address
Offset
$__00
$__01
$__02
$__03
Use
Access
Ethernet Physical Transceiver Control Register 0 (EPHYCTL0) R/W
Ethernet Physical Transceiver Control Register 1 (EPHYCTL1) R/W
Ethernet Physical Transceiver Status Register (EPHYSR)
R/W
RESERVED
R
12.3.2 Register Descriptions
12.3.2.1 Ethernet Physical Transceiver Control Register 0 (EPHYCTL0)
Module Base + $0
7
6
5
4
3
2
1
0
R
0
W
EPHYEN ANDIS
DIS100
DIS10
LEDEN EPHYWAI
EPHYIEN
RESET:
0
1
1
1
0
0
0
0
= Unimplemented or Reserved
Figure 12-3. Ethernet Physical Transceiver Control Register 0 (EPHYCTL0)
Read: Anytime
Write: See each bit description
EPHYEN — EPHY Enable
This bit can be written anytime.
1 = Enables EPHY
0 = Disables EPHY
MC9S12NE64 Data Sheet, Rev. 1.1
Freescale Semiconductor
351