MC9S12NE64V1 Datasheet, PDF (356/554 Pages) Freescale Semiconductor, Inc – MC9S12NE64V1 Data Sheet

Chapter 12 Ethernet Physical Transceiver (EPHYV2)
RAN — Restart Auto-Negotiation
The RAN bit determines when the A/N process can start processing.
1 = When auto-negotiation is enabled (ANE=1), the auto-negotiation process will be restarted.
After auto-negotiation indicates that it has been initialized, this bit is cleared. When bit ANE
is cleared to indicate auto-negotiation is disabled, RAN must also be 0.
0 = Normal operation.
DPLX — Duplex Mode
This mode can be selected by either the auto-negotiation process or manual duplex selection. Manual
duplex selection is allowed only while the auto-negotiation process is disabled (ANE=0). While the
auto-negotiation process is enabled (ANE = 1), the state of DPLX has no effect on the link
configuration. While loopback mode is asserted (LOOPBACK =1), the value of DPLX will have no
effect on the PHY.
1 = Indicates full-duplex mode
0 = Indicates half-duplex mode
COLTEST — Collision Test
The collision test function will be enabled only if the loopback mode of operation is also selected
(LOOPBACK = 1).
1 = Forces the PHY to assert the MII_COL signal within 512 bit times from the assertion of
MII_TXEN and de-assert MII_COL within 4 bit times of MII_TXEN being de-asserted.
0 = Normal operation
12.3.3.2 Status Register
This register advertises the capabilities of the port to the MII.
MII Register Address 1 (%00001)
15 14 13 12 11 10
9
8
7
R
100 100X 100X 10T
10T
T4
FD
HD
FD
HD
0
0
0
0
W
RESET: 0 1 1
1
1
0
0
0
0
6
5
4 32 1
0
SUP AN REM AN LNK JAB
PRE COMP FLT ABL STST DT
EX
CAP
1
0
0 10 0
1
= Unimplemented or Reserved
Figure 12-7. Status Register
Read: Anytime
Write: Writes have no effect
100T4 —100BASE-T4
1 = Indicates PHY supports 100BASE-T4 transmission
0 = Indicates the PHY does not support 100BASE-T4 transmission
This function is not implemented in the EPHY module.
100XFD —100BASE-TX Full-Duplex
1 = Indicates PHY supports 100BASE-TX full-duplex mode
0 = Indicates PHY does not support 100BASE-TX full-duplex mode
MC9S12NE64 Data Sheet, Rev. 1.1
356
Freescale Semiconductor