MC68LC302 Datasheet, PDF (92/169 Pages) Motorola, Inc – Low Power Integrated Multiprotocol Processor Reference Manual

Communications Processor (CP)
4.3.12.4 TRANSPARENT TRANSMIT BUFFER DESCRIPTOR (TX BD) . Data is pre-
sented to the CP for transmission on an SCC channel by arranging it in buffers referenced
by the channel's Tx BD table. The Tx BD is shown in Figure 4-9.
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
OFFSET + 0 R
X
W
I
L
————
———
— — UN CT
OFFSET + 2
DATA LENGTH
OFFSET + 4
OFFSET +6
TX BUFFER POINTER (24-bits used, upper 8 bits must be 0)
Figure 4-9. Transparent Transmit Buffer Descriptor
4.3.12.5 TRANSPARENT EVENT REGISTER . The SCC event register (SCCE) is referred
to as the transparent event register when the SCC is programmed as a transparent control-
ler. It is an 8-bit register used to report events recognized by the transparent channel and to
generate interrupts. On recognition of an event, the transparent controller sets the corre-
sponding bit in the transparent event register. A bit is cleared by writing a one (writing a zero
does not affect a bit's value). This register is cleared at reset.
7
6
5
4
3
2
1
0
CTS CD — TXE RCH BSY TX RX
4.3.12.6 TRANSPARENT MASK REGISTER . The SCC mask register (SCCM) is referred
to as the transparent mask register when the SCC is operating as a transparent controller.
It is an 8-bit read-write register that has the same bit format as the transparent event regis-
ter. If a bit in the transparent mask register is a one, the corresponding interrupt in the event
register will be enabled. If the bit is zero, the corresponding interrupt in the event register will
be masked. This register is cleared at reset.
4.4 SERIAL COMMUNICATION PORT (SCP)
The functionality of the SCP has not changed. For any additional information on parameters,
registers, and functionality, please refer to the MC68302 Users’ Manual.
4.4.1 SCP Programming Model
The SCP mode register consists of the upper eight bits of SPMODE. The SCP mode regis-
ter, an internal read-write register that controls both the SCP operation mode and clock
source, is cleared by reset.
15
14
13
12
11
10
9
8
STR ?LOOP CI PM3 PM2 PM1 PM0 EN
MOTOROLA
MC68LC302 REFERENCE MANUAL
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