MC68LC302 Datasheet, PDF (162/169 Pages) Motorola, Inc – Low Power Integrated Multiprotocol Processor Reference Manual

INDEX
A
Address
AS 3-25
Decode
Conflict 2-4
Decode Conflict 3-3, 3-4
Address Bus Pins 5-7
AS 3-3, 3-25, 5-9
AT command set 4-9
Autobaud Controller 4-9
Autobaud Command Descriptor 4-14
Autobaud Lookup Table Format 4-16
Autobaud Parameter RAM 4-11
Autobaud Sampling Rate 4-15
Autobaud Transmission 4-18
Automatic Echo 4-19
Carrier Detect Lost 4-18
Channel Reception Process 4-9
Determining Character Length and
Parity 4-17
End Of Table Error 4-18
Enter_Baud_Hunt Command 4-14
Lookup Table 4-15
Lookup Table Example 4-17
Lookup Table Pointer 4-15
Lookup Table Size 4-15
Maximum START bit length 4-16
Overrun Error 4-18
Performance 4-9
Preparing for the Autobaud Process 4-13
Programming Model 4-13
Reception Error Handling Procedure 4-
18
Reprogramming to UART Mode or
another protocol 4-20
Smart Echo 4-11, 4-19
Smart Echo Hardware Setup 4-11
START bit 4-9
Transmit Process 4-11
Automatic echo 4-5
B
Base Address Regisrter 2-4
Baud Rate Generator 5-18
BCR 3-13
BERR 2-4, 3-3, 3-4, 3-5, 3-6
BERR See Signals
BG 3-28, 5-11
BGACK 5-11
BISYNC Controller 4-22
BISYNC Event Register 4-23
BISYNC Mask Register 4-23
BISYNC Memory Map 4-22
BISYNC Mode Register 4-22
BISYNC Receive Buffer Descriptor 4-22
BISYNC Transmit Buffer Descriptor 4-22
Bootstrap 3-7
BR 3-28, 3-29, 5-10
BR3–BR0 3-26
BRG 2-12
BRG Clock 2-12
BRG Divide by two
System Clock 2-14
BSR 3-6
Buffer
Buffer Descriptor 4-6
Descriptors 2-20, 3-29
Buffer Descriptor 4-6
Buffer Descriptors Table 4-6
Bus
Arbitration 3-28, 5-11
Bandwidth 3-12
Error 2-4
Grant (BG) 5-11
Grant Acknowledge (BGACK) 5-11
Master 3-28
Request (BR) 5-10
Signal Summary 5-13
Bus Arbitration Logic 3-28
External Bus Arbitration 3-28
Internal Bus Arbitration 3-28
MOTOROLA
MC68LC302 REFERENCE MANUAL
INDEX-1