MC68LC302 Datasheet, PDF (13/169 Pages) Motorola, Inc – Low Power Integrated Multiprotocol Processor Reference Manual

Introduction
The following features have been removed or modified from the 68302 in order to make the
LC302 possible.
• SCC3 and its baud rate generator (BRG3) are removed.
• External masters are not able to take the bus away from the LC302 except through a
simple scheme using the HALT pin. This restriction does not apply to using the LC302
in CPU disabled mode (slave mode), in which case BR, BG, and BGACK are all avail-
able (they replace the IPL2-0 pins).
• Although the Independent DMA (IDMA) is still available, the external IDMA request pins
(DREQ, DACK, and DONE) have been eliminated.
• Four address lines have been eliminated, giving a total of 20 address lines. However,
the LC302 supports more than a 1 MB addressing range, since each of the four chip
selects still decodes a 24-bit address. This allows a total of 4 MB to be addressed.
• Since the function code pins and AVEC have been removed, interrupt acknowledgment
to external devices is only provided on levels one, six, and seven.
• The DDCMP and V.110 protocols have been removed.
• The total list of pins removed is: A23-A20, FC2-FC0^†, AVEC^†, RMC, IAC^†, BERR, BR,
BG, BGACK, BCLR, IACK1, IACK6, IACK7, DREQ, DACK, DONE, BRG1, FRZ^†,
TOUT1, NC1, NC3, TCLK3, RTS3, CTS3, CD3, plus 5 power and ground pins.
NOTE
Signals marked with ^† are available in the PGA Package.
• The SCP pins are now muxed with PA8, PA9, and PA10. The TXD3, RXD3, and RCLK3
functions associated with SCC3 are eliminated.
• The UDS, LDS, and R/W pins are not available except in slave mode, where they re-
place the WEH, WEL, and OE pins. Instead, the new pins WEH, WEL, and OE have
been defined for glueless interfacing to memory.
• PA12 is now muxed with the MODCLK pin, which is associated with the 32 kHz or 4
MHz PLL. The MODCLK pin is sampled after reset, and then becomes PA12.
• New VCCsyn, GNDsyn, and XFC pins have been added in support of the on-chip PLL.
• For purposes of emulation support only, a special 132 PGA version is supported. This
version adds back the FC2-0, IAC, FRZ, and AVEC pins. The FC2-0 pins allow bus cy-
cles to be distinguished between program and data accesses, interrupt cycles, etc. The
IAC, FRZ, and AVEC pins are provided so that emulation vendors can quickly retrofit
their existing 68302 emulator designs to support the LC302.
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MC68LC302 REFERENCE MANUAL
MOTOROLA