MC68LC302 Datasheet, PDF (40/169 Pages) Motorola, Inc – Low Power Integrated Multiprotocol Processor Reference Manual

System Integration Block (SIB)
3.1.2 System Status Bits
Bits 27-24 of the SCR are used to report events recognized by the system control logic. On
recognition of an event, this logic sets the corresponding bit in the SCR. These bits may be
read at any time. A bit is reset by a one and is left unchanged by a zero. More than one bit
may be reset at a time. For more information on these bits, please refer to the MC68302
User’ s Manual.
After system reset (simultaneous assertion of RESET and HALT), these bits are cleared.
IPA—Interrupt Priority Active
This bit is set when the M68000 core has an unmasked interrupt request.
NOTE
If BCLM is set, an interrupt handler will normally clear IPA at the
end of the interrupt routine to allow an alternate bus master to
regain the bus; however, if BCLM is cleared, no additional action
needs to be taken in the interrupt handler.
HWT—Hardware Watchdog Timeout
This bit is set when the hardware watchdog (see 3.1.5 Hardware Watchdog) reaches the
end of its time interval; an internal BERR is generated following the watchdog timeout,
even if this bit is already set.
WPV—Write Protect Violation
This bit is set when a bus master attempts to write to a location that has RW set to zero
(read only) in its associated base register (BR3–BR0).
ADC—Address Decode Conflict
This bit is set when a conflict has occurred in the chip-select logic because two or more
chip-select lines attempt assertion in the same bus cycle.
3.1.3 System Control Bits
The system control logic uses six control bits in the SCR.
WPVE—Write Protect Violation Enable
0 = an internal BERR is not asserted when a write protect violation occurs.
1 = an internal BERR is asserted when a write protect violation occurs.
After system reset, this bit defaults to zero.
NOTE
WPV will be set regardless of the value of WPVE.
RMCST—RMC Cycle Special Treatment
0 = The locked read-modify-write cycles of the TAS instruction will be identical to the
M68000 (AS and CS will be asserted during the entire cycle). The arbiter will issue
MOTOROLA
MC68LC302 REFERENCE MANUAL
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