MC68LC302 Datasheet, PDF (32/169 Pages) Motorola, Inc – Low Power Integrated Multiprotocol Processor Reference Manual

Configuration, Clocking, Low Power Modes, and Internal Memory Map
The criteria for enabling Ringo and waking up the CPU (by giving it an interrupt) is: RIN-
GOEN=1 and an unmasked PITEv, PB10Ev, or PB9Ev event occurs (please refer to the
IWUCR register)
The internal ring oscillator is not enabled if the PLL is disabled. A system with the PLL dis-
abled has to have an external oscillator connected in order to shorten the wake-up time.
There are two possible interrupts to the CPU from the Ringo logic:
— Interrupt when Ringo is enabled; the CPU is always interrupted when Ringo starts
oscillating (RINGOEN bit enables both ring oscillator and enables the interrupt to the
CPU). Event bits for this interrupt are all wake-up events.
— Maskable interrupt when the system clock switches to the real clock. The event bit
for this interrupt is in the ring oscillator event register.
The Ringo interrupts can be either at level 1, 6, or 7 according to RICR bits. If the CPU de-
termines that the system needs the real clock, it programs the RECLMODE bits which en-
ables the oscillator and PLL and interrupts if necessary; if it decides that the system can go
back to sleep, it executes the normal power-down sequence which turns off Ringo. Upon
switching to the real clock, the CPU can be interrupted by programming the RICR bits. (Note
that Ringo is turned off either at the end of a power down sequence, or when the PLL has
gained lock). If the RECLMODE bits are programmed to enable the PLL and the oscillator,
the user is allowed to enter low power mode after the real clock has resumed. The chip will
not operate correctly if the CPU enters the low power sequence while the PLL is waking up.
Resetting of the RINGOEN bit is allowed only if the system is clocked by the real clock. The
CLKO signal can be disabled by software if the user cannot operate the system at the Ringo
frequency.
2.4.4.3.5 Ring Oscillator Control Register (RINGOCR)
RINGOCR
7
6
5
4
3
RICR
RESET:
0
0
0
0
0
Read/Write
2
1
RECLMODE
0
0
BAR+$81A
0
RINGOEN
0
RINGOEN — Ring Oscillator Enable
0 = Ring oscillator is not used
1 = Ring oscillator is enabled
RECLMODE — Real Clock Mode
00 = Do not enable the real clock
01 = Enable the real clock and switch the system clock from Ringo to the real clock
once it is stable
10 = Enable the real clock and generate an interrupt to the CPU after the switch occurs
11 = Reserved
MOTOROLA
MC68LC302 REFERENCE MANUAL
2-19