MC68LC302 Datasheet, PDF (113/169 Pages) Motorola, Inc – Low Power Integrated Multiprotocol Processor Reference Manual

Signal Description
MODE and SIMASK registers. If SCC2 is in NMSI mode, this pin operates as BRG2, the out-
put of the SCC2 baud rate generator, unless SDS2 is enabled to be asserted during the B1
or B2 channels of ISDN (bits SDC2–SDC1 of SIMODE). SDS2/BRG2 may be temporarily
disabled by configuring it as a general-purpose output pin. The input buffers have Schmitt
triggers. TCLK2 acts as the SCC2 baud rate generator output if SCC2 is in one of the mul-
tiplexed modes.
• RXD2/PA0
• TXD2/PA1
• RCLK2/PA2
• TCLK2/PA3
• CTS2/PA4
• RTS2/PA5
• CD2/PA6
• BOOT/SDS2/PA7/BRG2
Table 5-10. Baud Rate Generator Outputs
Source
SCC2
NMSI
BRG2
GCI
TCLK2
IDL
TCLK2
PCM
TCLK2
NOTE: In NMSI mode, the baud rate generator outputs can also
appear on the RCLK and TCLK pins as programmed in the
SCON register.
NOTE
PA7 and PA5 pins are sampled at initialization to determine the
boot mode. To enable Boot from SCC2 mode, PA7 has to be
pulled LOW during Reset (with 5ns hold time after negation of
RESET and HALT). If Boot mode is enabled, PA5 determines
the Clock source to SCC2. This pin has to be valid for 100 clocks
after the negation of RESET and HALT. The user can pull it
HIGH or LOW with an external resistor. If Boot mode is not en-
abled PA5 is not sampled at initialization.
5.15 PAIO / SCP PINS
The NMSI3 port or port A pins or SCP pins are shown in Figure 5-11.
5-18
MC68LC302 REFERENCE MANUAL
MOTOROLA