MC68LC302 Datasheet, PDF (57/169 Pages) Motorola, Inc – Low Power Integrated Multiprotocol Processor Reference Manual

System Integration Block (SIB)
Port B Data Direction Register(PBDDR)
15
12
11
10
9
8
7
6
5
4
3
2
1
0
RESERVED
DB DB DB DB DB DB DB
-
DB
-
-
-
0 = Input
1 = Output
Port B Data Register(PBDAT)
15
12
11
10
9
8
7
6
5
4
3
2
1
0
RESERVED
PB
PB
PB
PB
PB
PB
PB
-
PB
-
-
-
Port N Data Direction Register(PNDDR)
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
DN DN DN DN DN DN DN DN
RESERVED
0 = Input
1 = Output
Port N Data Register (PNDAT)
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
PN PN PN PN PN PN PN PN
RESERVED
Figure 3-2. Parallel I/O Port Registers
3.7 TIMERS
The IMP includes four timer units: two identical general-purpose timers, a software watch-
dog timer, and a periodic interrupt timer (PIT).
Each general-purpose timer consists of a timer mode register (TMR), a timer capture regis-
ter (TCR), a timer counter (TCN), a timer reference register (TRR), and a timer event register
(TER). The TMR contains the prescaler value programmed by the user. The software watch-
dog timer, which has a watchdog reference register (WRR) and a watchdog counter (WCN),
uses a fixed prescaler value.
3.7.1 MC68LC302 General Purpose Timer Difference
The only difference between the MC68LC302 and the MC68302 general purpose timers is
that Timer 1 output signal is not connected to the externally.
3.7.2 General Purpose Timers Programming Mode
3.7.2.1 Timer Mode Register (TMR1, TMR2)
TMR1 and TMR2 are identical 16-bit registers. TMR1 and TMR2, which are memory-
mapped read-write registers to the user, are cleared by reset.
15
PRESCALER VALUE (PS)
8
7
6
5
4
3
2
1
0
CE
OM ORI FRR
ICLK
RST
RST—Reset Timer
0 = Reset timer (software reset), includes clearing the TMR, TRR, and TCN.
1 = Enable timer
3-20
MC68LC302 REFERENCE MANUAL
MOTOROLA