MC68LC302 Datasheet, PDF (153/169 Pages) Motorola, Inc – Low Power Integrated Multiprotocol Processor Reference Manual

Electrical Characteristics
6.22 AC ELECTRICAL SPECIFICATIONS—NMSI TIMING
The NMSI mode uses two clocks, one for receive and one for transmit. Both clocks can be
internal or external. When t he clock is internal, it is generated by the internal baud rate gen-
erator and it is output on TCLK or RCLK. All the timing is related to the external clock pin.
The timing is specified for NMSI1. It is also valid for NMSI2 and NMSI3 (see Figure 6-23).
16.67 MHz 16.67 MHz 20 MHz 20 MHz 25 MHz 25 MHz
Num.
Characteristic
Internal External Internal External Internal External
Clock
Clock
Clock
Clock
Clock
Clock _Unit
Min Max Min Max Min Max Min Max Min Max Min Max
315
RCLK1 and TCLK1 Fre-
quency (see Note 1)
— 5.55 — 6.668 — 6.66 — 8
316
RCLK1 and TCLK1 Low
(see Note 4)
65 — P+10 — 55 — P+10 —
316a RCLK1 and TCLK1 High
65 — 55 — 55 — 45 —
317
RCLK1 and TCLK1 Rise/Fall
Time (see Note 3)
—
20
—
—
—
17
—
—
318
TXD1 Active Delay from
TCLK1 Falling Edge
0 40 0 70 0 30 0 50
319
RTS1 Active/Inactive Delay
from TCLK1 Falling Edge
0
40
0 100 0 30 0 80
— 8.33 — 10 MHz
45 — P+10 — ns
45 — 35 — ns
— 14 — — ns
0 25 0 40 ns
0 25 0 65 ns
320
CTS1 Setup Time to TCLK1
Rising Edge
50
—
10
—
40
—
7
— 35 —
7
— ns
321
RXD1 Setup Time to RCLK1
Rising Edge
50
—
10
—
40
—
7
— 35 —
7
— ns
RXD1 Hold Time from
322 RCLK1 Rising Edge (see
Note 2)
10 — 50 — 7 — 40 — 7 — 35 — ns
323
CD1 Setup Time to RCLK1
Rising Edge
50
—
10
—
40
—
7
— 35 —
7
— ns
NOTES:
1. The ratio CLKO/TCLK1 and CLKO/RCLK1 must be greater than or equal to 2.5/1 for external clock. The input clock
to the baud rate generator may be either an internal clock or TIN1, and may be as fast as EXTAL. However, the
output of the baud rate generator must provide a CLKO/TCLK1 a nd CLKO/RCLK1 ratio greater than or equal to
3/1.In asynchronous mode (UART), the bit rate is 1/16 of the TCLK1/RCLK1 clock rate.
2. Also applies to CD hold time when CD is used as an external sync in BISYNC or totally transparent mode.
3. Schmitt triggers used on input buffers.
4. Where P = 1/CLKO. Thus, for a 16.67-MHz CLKO rate, P = 60 ns.
6-36
MC68LC302 REFERENCE MANUAL
MOTOROLA