MC68LC302 Datasheet, PDF (46/169 Pages) Motorola, Inc – Low Power Integrated Multiprotocol Processor Reference Manual

System Integration Block (SIB)
• If MODCLK0 = VCC, SCON1 is programmed to 0x00A8.
The following baud rates are achieved as a function of VCCSYN, MODCLK, and input clock:
VCCSYN-MODCLK
00
20 Mhz
10
4.192 Mhz
10
4.8 Mhz
11
32.768 Khz
11467 bps (SCON1=0x00D8)
9614 bps (SCON1=0x00D8)
11009 bps (SCON1=0x00D8)
9662 bps (SCON1=0x00A8)
The following paragraphs explain the boot process for the 32.768 Khz case in detail. If the
clock provided to the MC68LC302 is 32.768 KHz, the system frequency is multiplied by 401
to get 13.139968 MHz. The CD10-CD0 bits of the SCON are programmed to 84 decimal giv-
ing a UART frequency of 9662. In summary, 13.139968 MHz / (84 + 1) / 16 = 9662. If the
starting frequency is exactly 32.000 KHz, the UART frequency is 9435.
NOTE
The autobaud function cannot be used in the boot download pro-
cess.
Values in bit CD10:0 in SCON are not relevant if PA5=1
The RISC processor then programs the SCM register to $013D to program the SCC to
UART mode with both the receiver and the transmitter enabled, software operation mode
(CD and CTS are don't cares), 8-bit data characters, and no parity. The RISC processor then
begins receiving data into the dual-port RAM beginning with location $0 of the dual-port
RAM. Every character that is received is “echoed” back out of the TXD1 pin. The
MC68LC302 UART must be sent 576 bytes of data from the external UART since the LC302
will not leave the boot mode until 576 bytes are received. If the boot program is less than
576 bytes, the user is suggested to write $00 into the remaining locations.
After 576 bytes are received, the RISC programs the SCM register to $0, which clears the
ENR and ENT bits to disable the UART (returns to its reset value).
The RISC processor next negates the HALT signal to the core internally. The 68000 then
reads the reset vector from the first location of the dual-port RAM. In most cases, the code
that is downloaded will enable the chip selects of the MC68LC302, initialize the MC68LC302
receive buffer descriptors of SCC1 to continue receiving additional boot code into external
system RAM, and re-initialize the UART receiver.
NOTE
The first 576 bytes also overlays the exception vector table,
meaning that exception vectors will not work unless the user
carefully maps the code around certain desired vectors and
points those vectors into the 576 byte code space. In addition
MOTOROLA
MC68LC302 REFERENCE MANUAL
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