MC68LC302 Datasheet, PDF (33/169 Pages) Motorola, Inc – Low Power Integrated Multiprotocol Processor Reference Manual

Configuration, Clocking, Low Power Modes, and Internal Memory Map
RICR — Ring Oscillator Interrupt Control
00 = Connect Ringo Interrupts to 68k interrupt request level 1
01 = Connect Ringo Interrupts to 68k Interrupt request level 6
10 = Connect Ringo Interrupts to 68k interrupt request level 7
11 = Reserved
2.4.4.3.6 Ring Oscillator Event Register (RINGOEVR).
RINGOEVR
7
6
5
4
3
2
RESERVED
RESET:
0
0
0
0
0
0
Read/Write
BAR+$81B
1
0
RECLSEV
0
0
RECLSEV — Real Clock Switch Event
0 = Event has not occurred
1 = Real clock is now the system clock (This bit is reset by writing 1)
Bits 7-1 — Reserved
2.5 MC68LC302 DUAL PORT RAM
The internal 1152-byte dual-port RAM has 576 bytes of system RAM (see Table 2-4) and
576 bytes of parameter RAM (see Table 2-5).
Address
Base + 000
•
•
•
Base + 23F
Base +240
•
•
•
Base + 3FF
Table 2-4. System RAM
Width
Block
Description
576 Bytes
RAM
User Data Memory
Reserved
(Not Implemented)
The parameter RAM contains the buffer descriptors for each of the two SCC channels, the
SCP, and the two SMC channels. The memory structures of the three SCC channels are
identical. When any SCC, SCP, or SMC channel buffer descriptors or parameters are not
used, their parameter RAM area can be used for additional memory. For detailed informa-
tion about the use of the buffer descriptors and protocol parameters in a specific protocol,
see Section 4 Communications Processor (CP). CP. Base + 67E contains the MC68LC302
revision number.
2-20
MC68LC302 REFERENCE MANUAL
MOTOROLA