PIC18F47J53 Datasheet, PDF (97/586 Pages) Microchip Technology – 28/44-Pin, High-Performance USB Microcontrollers with nanoWatt XLP Technology

PIC18F47J53 FAMILY
TABLE 6-4: REGISTER FILE SUMMARY (PIC18F47J53 FAMILY) (CONTINUED)
Addr. File Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
F7Fh SPBRGH1
EUSART1 Baud Rate Generator High Byte
0000 0000
F7Eh BAUDCON1
ABDOVF RCIDL
RXDTP
TXCKP
BRG16
—
WUE
ABDEN 0100 0-00
F7Dh SPBRGH2
EUSART2 Baud Rate Generator High Byte
0000 0000
F7Ch BAUDCON2
ABDOVF RCIDL
RXDTP
TXCKP
BRG16
—
WUE
ABDEN 0100 0-00
F7Bh TMR3H
Timer3 Register High Byte
xxxx xxxx
F7Ah TMR3L
Timer3 Register Low Byte
xxxx xxxx
F79h T3CON
TMR3CS1 TMR3CS0 T3CKPS1 T3CKPS0 T3OSCEN T3SYNC
RD16
TMR3ON 0000 0000
F78h TMR4
Timer4 Register
0000 0000
F77h PR4
Timer4 Period Register
1111 1111
F76h T4CON
—
T4OUTPS3 T4OUTPS2 T4OUTPS1 T4OUTPS0 TMR4ON T4CKPS1 T4CKPS0 -000 0000
F75h
F74h
SSP2BUF
SSP2ADD
MSSP2 Receive Buffer/Transmit Register
MSSP2 Address Register (I²C™ Slave Mode). MSSP2 Baud Rate Reload Register (I²C Master Mode).
xxxx xxxx
---- ----
F74h SSP2MSK
MSK7
MSK6
MSK5
MSK4
MSK3
MSK2
MSK1
MSK0 0000 0000
F73h SSP2STAT
SMP
CKE
D/A
P
S
R/W
UA
BF
1111 1111
F72h SSP2CON1
WCOL
SSPOV
SSPEN
CKP
SSPM3
SSPM2
SSPM1
SSPM0 0000 0000
F71h SSP2CON2
GCEN
ACKSTAT ACKDT
ADMSK5
ACKEN
ADMSK4
RCEN
ADMSK3
PEN
ADMSK2
RSEN
ADMSK1
SEN 0000 0000
F70h CMSTAT
—
—
—
—
—
COUT3
COUT2
COUT1 ---- -111
F6Fh
PMADDRH/
—
CS1 Parallel Master Port Address High Byte
PMDOUT1H⁽¹⁾ _{Parallel Port Out Data High Byte (Buffer 1)}
-000 0000
0000 0000
F6Eh
F6Dh
F6Ch
PMADDRL/
PMDOUT1L⁽¹⁾
PMDIN1H⁽¹⁾
PMDIN1L⁽¹⁾
Parallel Master Port Address Low Byte/
Parallel Port Out Data Low Byte (Buffer 1)
Parallel Port In Data High Byte (Buffer 1)
Parallel Port In Data Low Byte (Buffer 1)
0000 0000
0000 0000
0000 0000
F6Bh TXADDRL
SPI DMA Transmit Data Pointer Low Byte
xxxx xxxx
F6Ah TXADDRH
—
—
—
—
SPI DMA Transmit Data Pointer High Byte
---- xxxx
F69h RXADDRL
SPI DMA Receive Data Pointer Low Byte
xxxx xxxx
F68h RXADDRH
—
—
—
—
SPI DMA Receive Data Pointer High Byte
---- xxxx
F67h DMABCL
SPI DMA Byte Count Low Byte
xxxx xxxx
F66h
F65h
DMABCH
UCON⁽¹⁾
—
—
—
—
—
—
SPI DMA Byte Count High ---- --xx
Byte
—
PPBRST
SE0
PKTDIS
USBEN RESUME SUSPND
—
-0x0 000-
F64h USTAT
—
ENDP3
ENDP2
ENDP1
ENDP0
DIR
PPBI
—
-xxx xxx-
F63h UEIR
BTSEF
—
—
BTOEF
DFN8EF CRC16EF CRC5EF
PIDEF 0--0 0000
F62h UIR
—
SOFIF
STALLIF
IDLEIF
TRNIF
ACTVIF
UERRIF
URSTIF -000 0000
F61h UFRMH
—
—
—
—
—
FRM10
FRM9
FRM8 ---- -xxx
F60h
F5Fh
F5Eh
F5Dh
F5Ch
F5Bh
F5Ah
F59h
F58h
F57h
F56h
F55h
F54h
UFRML
PMCONH⁽¹⁾
PMCONL⁽¹⁾
PMMODEH⁽¹⁾
PMMODEL⁽¹⁾
PMDOUT2H⁽¹⁾
PMDOUT2L⁽¹⁾
PMDIN2H⁽¹⁾
PMDIN2L⁽¹⁾
PMEH⁽¹⁾
PMEL⁽¹⁾
PMSTATH⁽¹⁾
PMSTATL⁽¹⁾
FRM7
FRM6
FRM5
FRM4
PMPEN
—
PSIDL ADRMUX1
CSF1
CSF0
ALP
—
BUSY
IRQM1
IRQM0
INCM1
WAITB1 WAITB0 WAITM3 WAITM2
Parallel Port Out Data High Byte (Buffer 2)
Parallel Port Out Data Low Byte (Buffer 2)
Parallel Port In Data High Byte (Buffer 2)
Parallel Port In Data Low Byte (Buffer 2)
PTEN15 PTEN14 PTEN13 PTEN12
PTEN7
PTEN6
PTEN5
PTEN4
IBF
IBOV
—
—
OBE
OBUF
—
—
FRM3
ADRMUX0
CS1P
INCM0
WAITM1
PTEN11
PTEN3
IB3F
OB3E
FRM2
PTBEEN
BEP
MODE16
WAITM0
PTEN10
PTEN2
IB2F
OB2E
FRM1
PTWREN
WRSP
MODE1
WAITE1
PTEN9
PTEN1
IB1F
OB1E
FRM0
PTRDEN
RDSP
MODE0
WAITE0
PTEN8
PTEN0
IB0F
OB0E
xxxx xxxx
0-00 0000
000- 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
00-- 0000
10-- 1111
Legend:
Note 1:
2:
3:
x = unknown, u = unchanged, - = unimplemented, q = value depends on condition, r = reserved, do not modify
Implemented only for 44-pin devices (PIC18F46J53, PIC18F47J53, PIC18LF46J53 and PIC18LF47J53).
Implemented only for 28-pin devices (PIC18F26J53, PIC18F27J53, PIC18LF26J53 and PIC18LF27J53).
Implemented only for devices with 128 Kbyte of program memory (PIC18F27J53, PIC18F47J53, PIC18LF27J53 and PIC18LF47J53).
 2010 Microchip Technology Inc.
Preliminary
DS39964B-page 97