PIC18F47J53 Datasheet, PDF (419/586 Pages) Microchip Technology – 28/44-Pin, High-Performance USB Microcontrollers with nanoWatt XLP Technology

PIC18F47J53 FAMILY
26.0 HIGH/LOW VOLTAGE DETECT
(HLVD)
The High/Low-Voltage Detect (HLVD) module can be
used to monitor the absolute voltage on VDD or the
HLVDIN pin. This is a programmable circuit that allows
the user to specify both a device voltage trip point and
the direction of change from that point.
If the module detects an excursion past the trip point in
that direction, an interrupt flag is set. If the interrupt is
enabled, the program execution will branch to the inter-
rupt vector address and the software can then respond
to the interrupt.
The High/Low-Voltage Detect Control register
(Register 26-1) completely controls the operation of the
HLVD module. This allows the circuitry to be “turned
off” by the user under software control, which
minimizes the current consumption for the device.
Figure 26-1 provides a block diagram for the HLVD
module.
REGISTER 26-1: HLVDCON: HIGH/LOW-VOLTAGE DETECT CONTROL REGISTER (ACCESS F85h)
R/W-0
VDIRMAG
bit 7
R-0
BGVST
R-0
IRVST
R/W-0
HLVDEN
R/W-0
HLVDL3⁽¹⁾
R/W-0
HLVDL2⁽¹⁾
R/W-0
HLVDL1⁽¹⁾
R/W-0
HLVDL0⁽¹⁾
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
bit 6
bit 5
bit 4
bit 3-0
VDIRMAG: Voltage Direction Magnitude Select bit
1 = Event occurs when the voltage equals or exceeds the trip point (HLVDL<3:0>)
0 = Event occurs when the voltage equals or falls below the trip point (HLVDL<3:0>)
BGVST: Band Gap Reference Voltages Stable Status Flag bit
1 = Indicates internal band gap voltage references is stable
0 = Indicates internal band gap voltage reference is not stable
IRVST: Internal Reference Voltage Stable Flag bit
1 = Indicates that the voltage detect logic will generate the interrupt flag at the specified voltage range
0 = Indicates that the voltage detect logic will not generate the interrupt flag at the specified voltage
range and the HLVD interrupt should not be enabled
HLVDEN: High/Low-Voltage Detect Power Enable bit
1 = HLVD is enabled
0 = HLVD is disabled
HLVDL<3:0>: Voltage Detection Limit bits⁽¹⁾
1111 = External analog input is used (input comes from the HLVDIN pin)
1110 = Maximum setting
.
.
.
0000 = Minimum setting
Note 1: See Table 31-8 in Section 31.0 “Electrical Characteristics” for specifications.
The module is enabled by setting the HLVDEN bit.
Each time the module is enabled, the circuitry requires
some time to stabilize. The IRVST bit is a read-only bit
that indicates when the circuit is stable. The module
can generate an interrupt only after the circuit is stable
and IRVST is set.
The VDIRMAG bit determines the overall operation of
the module. When VDIRMAG is cleared, the module
monitors for drops in VDD below a predetermined set
point. When the bit is set, the module monitors for rises
in VDD above the set point.
 2010 Microchip Technology Inc.
Preliminary
DS39964B-page 419