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| PIC18F47J53 Datasheet, PDF (301/586 Pages) Microchip Technology – 28/44-Pin, High-Performance USB Microcontrollers with nanoWatt XLP Technology | |||
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PIC18F47J53 FAMILY
TABLE 20-2: REGISTERS ASSOCIATED WITH SPI OPERATION
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
INTCON
PIR1
PIE1
IPR1
PIR3
PIE3
IPR3
TRISB
TRISC
TRISD
SSP1BUF
SSPxCON1
GIE/GIEH
PMPIF(2)
PMPIE(2)
PMPIP(2)
PEIE/GIEL
ADIF
ADIE
ADIP
TMR0IE
RC1IF
RC1IE
RC1IP
INT0IE
TX1IF
TX1IE
TX1IP
SSP2IF BCL2IF
RC2IF
TX2IF
SSP2IE BCL2IE
RC2IE
TX2IE
SSP2IP BCL2IP
RC2IP
TX2IP
TRISB7 TRISB6 TRISB5 TRISB4
TRISC7 TRISC6
â
â
TRISD7 TRISD6 TRISD5 TRISD4
MSSP1 Receive Buffer/Transmit Register
WCOL SSPOV SSPEN
CKP
RBIE
SSP1IF
SSP1IE
SSP1IP
TMR4IF
TMR4IE
TMR4IP
TRISB3
â
TRISD3
SSPM3
TMR0IF
CCP1IF
CCP1IE
CCP1IP
CTMUIF
CTMUIE
CTMUIP
TRISB2
TRISC2
TRISD2
INT0IF
TMR2IF
TMR2IE
TMR2IP
TMR3GIF
TMR3GIE
TMR3GIP
TRISB1
TRISC1
TRISD1
RBIF
TMR1IF
TMR1IE
TMR1IP
RTCCIF
RTCCIE
RTCCIP
TRISB0
TRISC0
TRISD0
SSPM2 SSPM1 SSPM0
SSPxSTAT
SMP
CKE
D/A
P
S
R/W
UA
BF
SSP2BUF MSSP2 Receive Buffer/Transmit Register
ODCON3(1)
â
â
â
â
â
â
SPI2OD SPI1OD
Legend: Shaded cells are not used by the MSSPx module in SPI mode.
Note 1: Configuration SFR overlaps with default SFR at this address; available only when WDTCON<4> = 1.
2: These bits are only available on 44-pin devices.
ï£ 2010 Microchip Technology Inc.
Preliminary
DS39964B-page 301
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