PIC18F47J53 Datasheet, PDF (577/586 Pages) Microchip Technology – 28/44-Pin, High-Performance USB Microcontrollers with nanoWatt XLP Technology

PIC18F47J53 FAMILY
VDDCORE/VCAP...................................................... 29, 21
VSS1...................................................................... 21, 29
VSS2...................................................................... 21, 29
VUSB...................................................................... 21, 29
Pinout I/O Descriptions
PIC18F2XJ53 (28-Pin)................................................ 16
PIC18F4XJ53 (44-Pin)................................................ 22
PIR Registers .............................................................. 126–??
PLL Frequency Multiplier .................................................... 38
POP .................................................................................. 488
POR. See Power-on Reset.
PORTA
Additional Pin Functions
Ultra Low-Power Wake-up .................................. 61
Associated Registers ................................................ 147
LATA Register........................................................... 145
PORTA Register ....................................................... 145
TRISA Register ......................................................... 145
PORTB
Associated Registers ................................................ 151
LATB Register........................................................... 148
PORTB Register ....................................................... 148
RB7:RB4 Interrupt-on-Change Flag (RBIF Bit)......... 148
TRISB Register ......................................................... 148
PORTC
Associated Registers ................................................ 154
LATC Register .......................................................... 152
PORTC Register ....................................................... 152
TRISC Register......................................................... 152
PORTD
Associated Registers ................................................ 157
LATD Register .......................................................... 155
PORTD Register ....................................................... 155
TRISD Register......................................................... 155
PORTE
Associated Registers ................................................ 159
LATE Register........................................................... 158
PORTE Register ....................................................... 158
TRISE Register ......................................................... 158
Power-Managed Modes
and EUSART Operation............................................ 349
and PWM Operation ................................................. 289
and SPI Operation .................................................... 300
Clock Sources............................................................. 47
Entering....................................................................... 47
Selecting ..................................................................... 47
Power-on Reset (POR) ....................................................... 67
Power-up Delays................................................................. 46
Power-up Timer (PWRT) .............................................. 46, 68
Time-out Sequence..................................................... 68
Prescaler, Capture ............................................................ 263
Prescaler, Timer0.............................................................. 207
Prescaler, Timer2.............................................................. 267
PRI_IDLE Mode .................................................................. 52
PRI_RUN Mode .................................................................. 49
Product Identification System ........................................... 585
Program Counter ................................................................ 83
PCL, PCH and PCU Registers.................................... 83
PCLATH and PCLATU Registers ............................... 83
Program Memory
ALU
STATUS............................................................ 102
Extended Instruction Set........................................... 105
Flash Configuration Words ......................................... 82
Hard Memory Vectors ................................................. 82
Instructions ................................................................. 87
Two-Word ........................................................... 87
Interrupt Vector........................................................... 82
Look-up Tables........................................................... 85
Memory Maps............................................................. 81
Hard Vectors and Configuration Words.............. 82
Reset Vector............................................................... 82
Program Verification and Code Protection ....................... 457
Programming, Device Instructions.................................... 459
Pulse Steering .................................................................. 286
Pulse-Width Modulation. See PWM (CCP Module).
PUSH................................................................................ 488
PUSH and POP Instructions............................................... 84
PUSHL.............................................................................. 504
PWM (CCP Module)
Associated Registers................................................ 268
Duty Cycle ................................................................ 267
Example Frequencies/Resolutions ........................... 267
Period ....................................................................... 266
Setup for PWM Operation ........................................ 267
TMR2 to PR2 Match ................................................. 266
TMRx to PRx Match ................................................. 233
PWM (ECCP Module)
Effects of a Reset ..................................................... 289
Operation in Power-Managed Modes ....................... 289
Operation with Fail-Safe Clock Monitor .................... 289
Pulse Steering .......................................................... 286
Steering Synchronization.......................................... 288
PWM Mode. See Enhanced Capture/Compare/PWM ...... 275
Q
Q Clock ............................................................................. 267
R
RAM. See Data Memory.
RBIF Bit ............................................................................ 148
RC_IDLE Mode................................................................... 54
RC_RUN Mode................................................................... 50
RCALL .............................................................................. 489
RCON Register
Bit Status During Initialization..................................... 70
Reader Response............................................................. 584
Real-Time Clock and Calendar (RTCC) ........................... 237
Operation.................................................................. 249
Registers .................................................................. 238
Reference Clock Output ..................................................... 45
Register File........................................................................ 91
Registers
ADCON0 (A/D Control 0).......................................... 368
ADCON1 (A/D Control 1).......................................... 369
ADCTRIG (A/D Trigger)............................................ 376
ALRMCFG (Alarm Configuration)............................. 241
ALRMDAY (Alarm Day Value).................................. 246
ALRMHR (Alarm Hours Value)................................. 247
ALRMMIN (Alarm Minutes Value) ............................ 248
ALRMMNTH (Alarm Month Value) ........................... 246
ALRMRPT (Alarm Repeat Counter) ......................... 242
ALRMSEC (Alarm Seconds Value) .......................... 248
ALRMWD (Alarm Weekday Value)........................... 247
ANCON0 (A/D Port Configuration 0) ........................ 371
ANCON1 (A/D Port Configuration 1) ........................ 371
Associated with Comparator..................................... 407
Associated with Program Flash Memory .................. 118
BAUDCONx (Baud Rate Control)............................. 348
BDnSTAT ................................................................. 389
 2010 Microchip Technology Inc.
Preliminary
DS39964B-page 577