PIC18F47J53 Datasheet, PDF (155/586 Pages) Microchip Technology – 28/44-Pin, High-Performance USB Microcontrollers with nanoWatt XLP Technology

PIC18F47J53 FAMILY
10.5 PORTD, TRISD and LATD
Registers
Note: PORTD is available only in 44-pin devices.
PORTD is an 8-bit wide, bidirectional port. The corre-
sponding Data Direction register is TRISD. Setting a
TRISD bit (= 1) will make the corresponding PORTD
pin an input (i.e., put the corresponding output driver in
a High-Impedance mode). Clearing a TRISD bit (= 0)
will make the corresponding PORTD pin an output (i.e.,
put the contents of the output latch on the selected pin).
The Data Latch register (LATD) is also memory
mapped. Read-modify-write operations on the LATD
register read and write the latched output value for
PORTD.
All pins on PORTD are implemented with Schmitt Trigger
input buffers. Each pin is individually configurable as an
input or output.
Note: On a POR, these pins are configured as
digital inputs.
EXAMPLE 10-5: INITIALIZING PORTD
CLRF PORTD
CLRF LATD
MOVLW 0CFh
MOVWF TRISD
; Initialize PORTD by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
; Value used to
; initialize data
; direction
; Set RD<3:0> as inputs
; RD<5:4> as outputs
; RD<7:6> as inputs
Each of the PORTD pins has a weak internal pull-up. A
single control bit can turn on all the pull-ups. This is per-
formed by setting bit, RDPU (TRISE<7>). The weak
pull-up is automatically turned off when the port pin is
configured as an output. The pull-ups are disabled on a
POR. The integrated weak pull-ups consist of a semi-
conductor structure similar to, but somewhat different,
from, a discrete resistor. On an unloaded I/O pin the
weak pull-ups are intended to provide logic high indica-
tion, but will not necessarily pull the pin all the way to
VDD levels.
Note that the pull-ups can be used for any set of
features, similar to the pull-ups found on PORTB.
 2010 Microchip Technology Inc.
Preliminary
DS39964B-page 155