PIC18F47J53 Datasheet, PDF (453/586 Pages) Microchip Technology – 28/44-Pin, High-Performance USB Microcontrollers with nanoWatt XLP Technology

PIC18F47J53 FAMILY
28.3 On-Chip Voltage Regulator
Note 1: The on-chip voltage regulator is only
available in parts designated with an “F”,
such as PIC18F26J53. The on-chip
regulator is disabled on devices with “LF”
in their part number.
2: The VDDCORE/VCAP pin must never be left
floating. On “F” devices, it must be con-
nected to a capacitor, of size CEFC, to
ground. On “LF” devices, VDDCORE/VCAP
must be connected to a power supply
source between 2.0V and 2.7V.
The digital core logic of the PIC18F47J53 family
devices is designed on an advanced manufacturing
process, which requires 2.0V to 2.7V. The digital core
logic obtains power from the VDDCORE/VCAP power
supply pin.
However, in many applications it may be inconvenient
to run the I/O pins at the same core logic voltage, as it
would restrict the ability of the device to interface with
other, higher voltage devices, such as those run at a
nominal 3.3V. Therefore, all PIC18F47J53 family
devices implement a dual power supply rail topology.
The core logic obtains power from the VDDCORE/VCAP
pin, while the general purpose I/O pins obtain power
from the VDD pin of the microcontroller, which may be
supplied with a voltage between 2.15V to 3.6V (“F”
device) or 2.0V to 3.6V (“LF” device).
This dual supply topology allows the microcontroller to
interface with standard 3.3V logic devices, while
running the core logic at a lower voltage of nominally
2.5V.
In order to make the microcontroller more convenient to
use, an integrated 2.5V low dropout, low quiescent
current linear regulator has been integrated on the die
inside PIC18F47J53 family devices. This regulator is
designed specifically to supply the core logic of the
device. It allows PIC18F47J53 family devices to
effectively run from a single power supply rail, without
the need for external regulators.
The on-chip voltage regulator is always enabled on “F”
devices. The VDDCORE/VCAP pin simultaneously serves
as the regulator output pin and the core logic supply
power input pin. A capacitor should be connected to the
VDDCORE/VCAP pin to ground and is necessary for regu-
lator stability. For example connections for PIC18F and
PIC18LF devices, see Figure 28-2.
On “LF” devices, the on-chip regulator is always
disabled. This allows the device to save a small amount
of quiescent current consumption, which may be
advantageous in some types of applications, such as
those which will entirely be running at a nominal 2.5V.
On “LF” devices, the VDDCORE/VCAP pin still serves as
the core logic power supply input pin, and therefore,
must be connected to a 2.0V to 2.7V supply rail at the
application circuit board level. On these devices, the
I/O pins may still optionally be supplied with a voltage
between 2.0V to 3.6V, provided that VDD is always
greater than, or equal to, VDDCORE/VCAP. For example
connections for PIC18F and PIC18LF devices, see
Figure 28-2.
Note:
In parts designated with an “LF”, such as
PIC18LF47J53, VDDCORE must never
exceed VDD.
The specifications for core voltage and capacitance are
listed in Section 31.3 “DC Characteristics:
PIC18F47J53 Family (Industrial)”.
28.3.1
VOLTAGE REGULATOR TRACKING
MODE AND LOW-VOLTAGE
DETECTION
On “F” devices, the on-chip regulator provides a con-
stant voltage of 2.5V nominal to the digital core logic.
The regulator can provide this level from a VDD of about
2.5V, all the way up to the device’s VDDMAX. It does not
have the capability to boost VDD levels below 2.5V.
When the VDD supply input voltage drops too low to
regulate 2.5V, the regulator enters Tracking mode. In
Tracking mode, the regulator output follows VDD, with a
typical voltage drop of 100 mV or less.
The on-chip regulator includes a simple Low-Voltage
Detect (LVD) circuit. This circuit is separate and
independent of the High/Low-Voltage Detect (HLVD)
module described in Section 26.0 “High/Low Voltage
Detect (HLVD)”. The on-chip regulator LVD circuit con-
tinuously monitors the VDDCORE voltage level and
updates the LVDSTAT bit in the WDTCON register. The
LVD detect threshold is set slightly below the normal
regulation set point of the on-chip regulator.
Application firmware may optionally poll the LVDSTAT
bit to determine when it is safe to run at maximum rated
frequency, so as not to inadvertently violate the voltage
versus frequency requirements provided by
Figure 31-1.
The VDDCORE monitoring LVD circuit is only active
when the on-chip regulator is enabled. On “LF”
devices, the Analog-to-Digital Converter and the HLVD
module can still be used to provide firmware with VDD
and VDDCORE voltage level information.
 2010 Microchip Technology Inc.
Preliminary
DS39964B-page 453