 English |
|
|
|
|
|
|
|
| PIC18F47J53 Datasheet, PDF (90/586 Pages) Microchip Technology – 28/44-Pin, High-Performance USB Microcontrollers with nanoWatt XLP Technology | |||
| |||
| ◁ |
PIC18F47J53 FAMILY
FIGURE 6-6:
BSR3:BSR0
= 0000
= 0001
= 0010
= 0011
= 0100
= 0101
= 0110
= 0111
= 1000
= 1001
= 1010
= 1011
= 1100
= 1101
= 1110
= 1111
DATA MEMORY MAP FOR PIC18F47J53 FAMILY DEVICES
Bank 0
Bank 1
Bank 2
Bank 3
Bank 4
Bank 5
Bank 6
Bank 7
Bank 8
Bank 9
Data Memory Map
00h
Access RAM(1)
000h
05Fh
FFh
GPR(1)
060h
0FFh
00h
100h
GPR(1)
FFh
1FFh
00h
200h
GPR(1)
FFh
2FFh
00h
300h
GPR(1)
FFh
3FFh
00h
400h
GPR(1)
FFh
00h
GPR(1)
FFh
00h
GPR(1)
4FFh
500h
5FFh
600h
FFh
00h
GPR(1)
6FFh
700h
FFh
00h
GPR(1)
7FFh
800h
FFh
00h
GPR(1)
8FFh
900h
When a = 0:
The BSR is ignored and the
Access Bank is used.
The first 96 bytes are general
purpose RAM (from Bank 0).
The remaining 160 bytes are
Special Function Registers
(from Bank 15).
When a = 1:
The BSR specifies the bank
used by the instruction.
Access Bank
00h
Access RAM Low 5Fh
Access RAM High 60h
(SFRs)
FFh
Bank 10
Bank 11
Bank 12
Bank 13
Bank 14
Bank 15
FFh
00h
GPR(1)
9FFh
A00h
FFh
00h
GPR(1)
AFFh
B00h
FFh
00h
GPR(1)
BFFh
C00h
FFh
00h
GPR, BDT(1)
CFFh
D00h
FFh
DFFh
00h
GPR(1)
E00h
C0h
FFh
Non-Access SFR(2)
EBFh
EC0h
EFFh
00h
F00h
Non-Access SFR(2)
60h
F5Fh
Access SFRs
FFh
FFFh
Note 1: These banks also serve as RAM buffers for USB operation. See Section 6.3.1 âUSB RAMâ for more information.
2: Addresses, EC0h through F5Fh, are not part of the Access Bank. Either the BANKED or the MOVFF instruction should
be used to access these SFRs.
DS39964B-page 90
Preliminary
ï£ 2010 Microchip Technology Inc.
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese