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PIC18F47J53 Datasheet, PDF (183/586 Pages) Microchip Technology – 28/44-Pin, High-Performance USB Microcontrollers with nanoWatt XLP Technology
PIC18F47J53 FAMILY
REGISTER 11-4: PMMODEL: PARALLEL PORT MODE REGISTER LOW BYTE (BANKED F5Ch)(1)
R/W-0
WAITB1(2)
bit 7
R/W-0
WAITB0(2)
R/W-0
WAITM3
R/W-0
WAITM2
R/W-0
WAITM1
R/W-0
WAITM0
R/W-0
WAITE1(2)
R/W-0
WAITE0(2)
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-6
bit 5-2
bit 1-0
WAITB<1:0>: Data Setup to Read/Write Wait State Configuration bits(2)
11 = Data Wait of 4 TCY; multiplexed address phase of 4 TCY
10 = Data Wait of 3 TCY; multiplexed address phase of 3 TCY
01 = Data Wait of 2 TCY; multiplexed address phase of 2 TCY
00 = Data Wait of 1 TCY; multiplexed address phase of 1 TCY
WAITM<3:0>: Read to Byte Enable Strobe Wait State Configuration bits
1111 = Wait of additional 15 TCY
.
.
.
0001 = Wait of additional 1 TCY
0000 = No additional Wait cycles (operation forced into one TCY)
WAITE<1:0>: Data Hold After Strobe Wait State Configuration bits(2)
11 = Wait of 4 TCY
10 = Wait of 3 TCY
01 = Wait of 2 TCY
00 = Wait of 1 TCY
Note 1: This register is only available on 44-pin devices.
2: WAITBx and WAITEx bits are ignored whenever WAITM<3:0> = 0000.
 2010 Microchip Technology Inc.
Preliminary
DS39964B-page 183