PIC18F47J53 Datasheet, PDF (403/586 Pages) Microchip Technology – 28/44-Pin, High-Performance USB Microcontrollers with nanoWatt XLP Technology

PIC18F47J53 FAMILY
23.7 Oscillator
The USB module has specific clock requirements. For
full-speed operation, the clock source must be 48 MHz.
Even so, the microcontroller core and other peripherals
are not required to run at that clock speed. Available
clocking options are described in detail in Section 3.3
“Oscillator Settings for USB”.
23.8 USB Firmware and Drivers
Microchip provides a number of application-specific
resources, such as USB firmware and driver support.
Refer to www.microchip.com for the latest firmware and
driver support.
TABLE 23-4: REGISTERS ASSOCIATED WITH USB MODULE OPERATION⁽¹⁾
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
INTCON
IPR2
PIR2
PIE2
UCON
UCFG
USTAT
UADDR
UFRML
UFRMH
UIR
UIE
UEIR
UEIE
UEP0
UEP1
UEP2
UEP3
UEP4
UEP5
UEP6
UEP7
UEP8
UEP9
UEP10
UEP11
UEP12
UEP13
UEP14
UEP15
Legend:
Note 1:
GIE/GIEH PEIE/GIEL TMR0IE
INT0IE
RBIE
TMR0IF
INT0IF
RBIF
OSCFIP
CM2IP
CM1IP
USBIP
BCL1IP
HLVDIP
TMR3IP
CCP2IP
OSCFIF
CM2IF
CM1IF
USBIF
BCL1IF
HLVDIF
TMR3IF
CCP2IF
OSCFIE
CM2IE
CM1IE
USBIE
BCL1IE
HLVDIE
TMR3IE
CCP2IE
—
PPBRST
SE0
PKTDIS
USBEN
RESUME SUSPND
—
UTEYE
UOEMON
—
UPUEN
UTRDIS
FSEN
PPB1
PPB0
—
ENDP3
ENDP2
ENDP1
ENDP0
DIR
PPBI
—
—
ADDR6
ADDR5
ADDR4
ADDR3
ADDR2
ADDR1
ADDR0
FRM7
FRM6
FRM5
FRM4
FRM3
FRM2
FRM1
FRM0
—
—
—
—
—
FRM10
FRM9
FRM8
—
SOFIF
STALLIF
IDLEIF
TRNIF
ACTVIF
UERRIF
URSTIF
—
SOFIE
STALLIE
IDLEIE
TRNIE
ACTVIE
UERRIE
URSTIE
BTSEF
—
—
BTOEF
DFN8EF CRC16EF CRC5EF
PIDEF
BTSEE
—
—
BTOEE
DFN8EE CRC16EE CRC5EE
PIDEE
—
—
—
EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL
—
—
—
EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL
—
—
—
EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL
—
—
—
EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL
—
—
—
EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL
—
—
—
EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL
—
—
—
EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL
—
—
—
EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL
—
—
—
EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL
—
—
—
EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL
—
—
—
EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL
—
—
—
EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL
—
—
—
EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL
—
—
—
EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL
—
—
—
EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL
—
—
—
EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL
— = unimplemented, read as ‘0’. Shaded cells are not used by the USB module.
This table includes only those hardware mapped SFRs located in Bank 15 of the data memory space. The Buffer
Descriptor registers, which are mapped into Bank 4 and are not true SFRs, are listed separately in Table 23-3.
 2010 Microchip Technology Inc.
Preliminary
DS39964B-page 403