PIC18F47J53 Datasheet, PDF (184/586 Pages) Microchip Technology – 28/44-Pin, High-Performance USB Microcontrollers with nanoWatt XLP Technology

PIC18F47J53 FAMILY
REGISTER 11-5: PMEH: PARALLEL PORT ENABLE REGISTER HIGH BYTE (BANKED F57h)⁽¹⁾
R/W-0
PTEN15
bit 7
R/W-0
PTEN14
R/W-0
PTEN13
R/W-0
PTEN12
R/W-0
PTEN11
R/W-0
PTEN10
R/W-0
PTEN9
R/W-0
PTEN8
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-6
bit 5-0
PTEN<15:14>: PMCS1 Port Enable bits
1 = PMA<15:14> function as either PMA<15:14> or PMCS2 and PMCS1
0 = PMA<15:14> function as port I/O
PTEN<13:8>: PMP Address Port Enable bits
1 = PMA<13:8> function as PMP address lines
0 = PMA<13:8> function as port I/O
Note 1: This register is only available on 44-pin devices.
REGISTER 11-6: PMEL: PARALLEL PORT ENABLE REGISTER LOW BYTE (BANKED F56h)⁽¹⁾
R/W-0
PTEN7
bit 7
R/W-0
PTEN6
R/W-0
PTEN5
R/W-0
PTEN4
R/W-0
PTEN3
R/W-0
PTEN2
R/W-0
PTEN1
R/W-0
PTEN0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-2
bit 1-0
PTEN<7:2>: PMP Address Port Enable bits
1 = PMA<7:2> function as PMP address lines
0 = PMA<7:2> function as port I/O
PTEN<1:0>: PMALH/PMALL Strobe Enable bits
1 = PMA<1:0> function as either PMA<1:0> or PMALH and PMALL
0 = PMA<1:0> pads functions as port I/O
Note 1: This register is only available on 44-pin devices.
DS39964B-page 184
Preliminary
 2010 Microchip Technology Inc.