PIC18F47J53 Datasheet, PDF (96/586 Pages) Microchip Technology – 28/44-Pin, High-Performance USB Microcontrollers with nanoWatt XLP Technology

PIC18F47J53 FAMILY
TABLE 6-4: REGISTER FILE SUMMARY (PIC18F47J53 FAMILY) (CONTINUED)
Addr. File Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
FAEh TXREG1
EUSART1 Transmit Register
xxxx xxxx
FADh TXSTA1
CSRC
TX9
TXEN
SYNC
SENDB
BRGH
TRMT
TX9D 0000 0010
FACh RCSTA1
SPEN
RX9
SREN
CREN
ADDEN
FERR
OERR
RX9D 0000 000x
FABh SPBRG2
EUSART2 Baud Rate Generator Register Low Byte
0000 0000
FAAh RCREG2
EUSART2 Receive Register
0000 0000
FA9h TXREG2
EUSART2 Transmit Register
0000 0000
FA8h TXSTA2
CSRC
TX9
TXEN
SYNC
SENDB
BRGH
TRMT
TX9D 0000 0010
FA7h EECON2
Flash Self-Program Control Register (not a physical register)
---- ----
FA6h EECON1
—
—
WPROG
FREE
WRERR
WREN
WR
—
--00 x00-
FA5h IPR3
SSP2IP
BCL2IP
RC2IP
TX2IP
TMR4IP CTMUIP TMR3GIP RTCCIP 1111 1111
FA4h PIR3
SSP2IF
BCL2IF
RC2IF
TX2IF
TMR4IF CTMUIF TMR3GIF RTCCIF 0000 0000
FA3h PIE3
SSP2IE BCL2IE
RC2IE
TX2IE
TMR4IE CTMUIE TMR3GIE RTCCIE 0000 0000
FA2h IPR2
OSCFIP
CM2IP
CM1IP
USBIP
BCL1IP
HLVDIP
TMR3IP
CCP2IP 1111 1111
FA1h PIR2
OSCFIF
CM2IF
CM1IF
USBIF
BCL1IF
HLVDIF
TMR3IF
CCP2IF 0000 0000
FA0h
F9Fh
F9Eh
F9Dh
PIE2
IPR1
PIR1
PIE1
OSCFIE
PMPIP⁽¹⁾
PMPIF⁽¹⁾
PMPIE⁽¹⁾
CM2IE
ADIP
ADIF
ADIE
CM1IE
RC1IP
RC1IF
RC1IE
USBIE
TX1IP
TX1IF
TX1IE
BCL1IE
SSP1IP
SSP1IF
SSP1IE
HLVDIE
CCP1IP
CCP1IF
CCP1IE
TMR3IE
TMR2IP
TMR2IF
TMR2IE
CCP2IE
TMR1IP
TMR1IF
TMR1IE
0000 0000
1111 1111
0000 0000
0000 0000
F9Ch RCSTA2
SPEN
RX9
SREN
CREN
ADDEN
FERR
OERR
RX9D 0000 000x
F9Bh OSCTUNE
INTSRC
PLLEN
TUN5
TUN4
TUN3
TUN2
TUN1
TUN0 0000 0000
F9Ah T1GCON
TMR1GE T1GPOL
T1GTM
T1GSPM
T1GGO/
T1DONE
T1GVAL
T1GSS1
T1GSS0 0000 0x00
F99h IPR5
—
—
CM3IP
TMR8IP
TMR6IP
TMR5IP TMR5GIP TMR1GIP --11 1111
F98h PIR5
—
—
CM3IF
TMR8IF
TMR6IF
TMR5IF TMR5GIF TMR1GIF --00 0000
F97h
F96h
F95h
T3GCON
TRISE⁽¹⁾
TRISD⁽¹⁾
TMR3GE T3GPOL
RDPU
TRISD7
REPU
TRISD6
T3GTM
—
TRISD5
T3GSPM
—
TRISD4
T3GGO/
T3DONE
—
TRISD3
T3GVAL
TRISE2
TRISD2
T3GSS1
TRISE1
TRISD1
T3GSS0 0000 0x00
TRISE0
TRISD0
00-- -111
1111 1111
F94h TRISC
TRISC7 TRISC6
—
—
—
TRISC2
TRISC1
TRISC0 1111 1111
F93h TRISB
TRISB7
TRISB6
TRISB5
TRISB4
TRISB3
TRISB2
TRISB1
TRISB0 1111 1111
F92h TRISA
TRISA7
TRISA6
TRISA5
—
TRISA3
TRISA2
TRISA1
TRISA0 111- 1111
F91h PIE5
—
—
CM3IE
TMR8IE
TMR6IE
TMR5IE TMR5GIE TMR1GIE --00 0000
F90h IPR4
CCP10IP CCP9IP CCP8IP
CCP7IP
CCP6IP
CCP5IP
CCP4IP
CCP3IP 1111 1111
F8Fh PIR4
CCP10IF CCP9IF CCP8IF
CCP7IF
CCP6IF
CCP5IF
CCP4IF
CCP3IF 0000 0000
F8Eh
F8Dh
F8Ch
PIE4
LATE⁽¹⁾
LATD⁽¹⁾
CCP10IE
—
LATD7
CCP9IE
—
LATD6
CCP8IE
—
LATD5
CCP7IE
—
LATD4
CCP6IE
—
LATD3
CCP5IE
LATE2
LATD2
CCP4IE
LATE1
LATD1
CCP3IE
LATE0
LATD0
0000 0000
---- -xxx
xxxx xxxx
F8Bh LATC
LATC7
LATC6
—
—
—
LATC2
LATC1
LATC0 xxxx xxxx
F8Ah LATB
LATB7
LATB6
LATB5
LATB4
LATB3
LATB2
LATB1
LATB0 xxxx xxxx
F89h LATA
LATA7
LATA6
LATA5
—
LATA3
LATA2
LATA1
LATA0 xxx- xxxx
F88h DMACON1
SSCON1 SSCON0 TXINC
RXINC DUPLEX1 DUPLEX0 DLYINTEN DMAEN 0000 0000
F87h OSCCON2
—
SOSCRUN
—
SOSCDRV SOSCGO PRISD
—
—
-0-1 01--
F86h DMACON2
DLYCYC3 DLYCYC2 DLYCYC1 DLYCYC0 INTLVL3 INTLVL2 INTLVL1 INTLVL0 0000 0000
F85h
F84h
F83h
HLVDCON
PORTE⁽¹⁾
PORTD⁽¹⁾
VDIRMAG
—
RD7
BGVST
—
RD6
IRVST
—
RD5
HLVDEN
—
RD4
HLVDL3
—
RD3
HLVDL2
RE2
RD2
HLVDL1
RE1
RD1
HLVDL0
RE0
RD0
0000 0000
---- -xxx
xxxx xxxx
F82h PORTC
RC7
RC6
RC5
RC4
—
RC2
RC1
RC0 xxxx xxxx
F81h PORTB
RB7
RB6
RB5
RB4
RB3
RB2
RB1
RB0
xxxx xxxx
F80h PORTA
RA7
RA6
RA5
—
RA3
RA2
RA1
RA0
xxx- xxxx
Legend:
Note 1:
2:
3:
x = unknown, u = unchanged, - = unimplemented, q = value depends on condition, r = reserved, do not modify
Implemented only for 44-pin devices (PIC18F46J53, PIC18F47J53, PIC18LF46J53 and PIC18LF47J53).
Implemented only for 28-pin devices (PIC18F26J53, PIC18F27J53, PIC18LF26J53 and PIC18LF27J53).
Implemented only for devices with 128 Kbyte of program memory (PIC18F27J53, PIC18F47J53, PIC18LF27J53 and PIC18LF47J53).
DS39964B-page 96
Preliminary
 2010 Microchip Technology Inc.