PIC18F47J53 Datasheet, PDF (368/586 Pages) Microchip Technology – 28/44-Pin, High-Performance USB Microcontrollers with nanoWatt XLP Technology

PIC18F47J53 FAMILY
REGISTER 22-1: ADCON0: A/D CONTROL REGISTER 0 (ACCESS FC2h)
R/W-0
VCFG1
bit 7
R/W-0
VCFG0
R/W-0
CHS3⁽²⁾
R/W-0
CHS2⁽²⁾
R/W-0
CHS1⁽²⁾
R/W-0
CHS0⁽²⁾
R/W-0
GO/DONE
R/W-0
ADON
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
bit 6
bit 5-2
bit 1
bit 0
VCFG1: Voltage Reference Configuration bit (VREF- source)
1 = VREF- (AN2)
0 = AVSS⁽⁴⁾
VCFG0: Voltage Reference Configuration bit (VREF+ source)
1 = VREF+ (AN3)
0 = AVDD⁽⁴⁾
CHS<3:0>: Analog Channel Select bits⁽²⁾
0000 = Channel 00 (AN0)
0001 = Channel 01 (AN1)
0010 = Channel 02 (AN2)
0011 = Channel 03 (AN3)
0100 = Channel 04 (AN4)
0101 = Channel 05 (AN5)⁽¹⁾
0110 = Channel 06 (AN6)⁽¹⁾
0111 = Channel 07 (AN7)⁽¹⁾
1000 = Channel 08 (AN8)
1001 = Channel 09 (AN9)
1010 = Channel 10 (AN10)
1011 = Channel 11 (AN11)
1100 = Channel 12 (AN12)
1101 = (Reserved)
1110 = VDDCORE
1111 = VBG Absolute Reference (~1.2V)⁽³⁾
GO/DONE: A/D Conversion Status bit
When ADON = 1:
1 = A/D conversion is in progress
0 = A/D is Idle
ADON: A/D On bit
1 = A/D Converter module is enabled
0 = A/D Converter module is disabled
Note 1:
2:
3:
4:
These channels are not implemented on 28-pin devices.
Performing a conversion on unimplemented channels will return random values.
For best accuracy, the band gap reference circuit should be enabled (ANCON1<7> = 1) at least 10 ms
before performing a conversion on this channel.
On 44-pin, QFN devices, AVDD and AVSS reference sources are intended to be externally connected to
VDD and VSS levels. Other package types tie AVDD and AVSS to VDD and VSS internally.
DS39964B-page 368
Preliminary
 2010 Microchip Technology Inc.