PIC18F47J53 Datasheet, PDF (261/586 Pages) Microchip Technology – 28/44-Pin, High-Performance USB Microcontrollers with nanoWatt XLP Technology

PIC18F47J53 FAMILY
18.1 CCP Module Configuration
Each Capture/Compare/PWM module is associated
with a control register (generically, CCPxCON) and a
data register (CCPRx). The data register, in turn, is
comprised of two eight-bit registers: CCPRxL (low
byte) and CCPRxH (high byte). All registers are both
readable and writable.
18.1.1 CCP MODULES AND TIMER
RESOURCES
The CCP modules utilize Timers 1 through 8, varying
with the selected mode. Various timers are available to
the CCP modules in Capture, Compare or PWM
modes, as shown in Table 18-1.
TABLE 18-1: CCP MODE – TIMER
RESOURCE
CCP Mode
Timer Resource
Capture
Compare
Timer1, Timer3 or Timer 5
PWM
Timer2, Timer4, Timer 6 or Timer8
The assignment of a particular timer to a module is
determined by the Timer to CCP enable bits in the
CCPTMRSx registers. (See Register 18-2 and
Register 18-3.) All of the modules may be active at
once and may share the same timer resource if they
are configured to operate in the same mode
(Capture/Compare or PWM), at the same time.
The CCPTMRS1 register selects the timers for CCP
modules, 7, 6, 5 and 4, and the CCPTMRS2 register
selects the timers for CCP modules, 10, 9 and 8. The
possible configurations are shown in Table 18-2 and
Table 18-3.
TABLE 18-2: TIMER ASSIGNMENTS FOR CCP MODULES 4, 5, 6 AND 7
CCPTMRS1 Register
CCP4
CCP5
CCP6
CCP7
C4TSEL
<1:0>
Capture/
Compare
Mode
PWM
Mode
Capture/
C5TSEL0 Compare
Mode
PWM
Mode
Capture/
C6TSEL0 Compare
Mode
PWM
Mode
C7TSEL
<1:0>
Capture/
Compare
Mode
PWM
Mode
00
TMR1 TMR2
0
TMR1 TMR2
0
01
TMR3 TMR4
1
TMR5 TMR4
1
10
TMR3 TMR6
11
Reserved⁽¹⁾
Note 1: Do not use the reserved bit configuration.
TMR1 TMR2 0 0
TMR5 TMR2 0 1
10
11
TMR1
TMR5
TMR5
TMR5
TMR2
TMR4
TMR6
TMR8
TABLE 18-3: TIMER ASSIGNMENTS FOR CCP MODULES 8, 9 AND 10
CCPTMRS2 Register
CCP8
CCP8
Devices with 64 Kbyte
CCP9
CCP10
C8TSEL
<1:0>
Capture/
Compare
Mode
PWM
Mode
C8TSEL
<1:0>
Capture/
Compare
Mode
PWM
Mode
Capture/
C9TSEL0 Compare
Mode
PWM
Mode
Capture/
C10TSEL0 Compare
Mode
PWM
Mode
00
TMR1 TMR2 0 0
TMR1 TMR2
0
01
TMR1 TMR4 0 1
TMR1 TMR4
1
10
TMR1 TMR6 1 0
TMR1 TMR6
11
Reserved⁽¹⁾
11
Reserved⁽¹⁾
Note 1: Do not use the reserved bit configuration.
TMR1 TMR2
0
TMR1 TMR4
1
TMR1 TMR2
Reserved⁽¹⁾
 2010 Microchip Technology Inc.
Preliminary
DS39964B-page 261