PIC18F47J53 Datasheet, PDF (431/586 Pages) Microchip Technology – 28/44-Pin, High-Performance USB Microcontrollers with nanoWatt XLP Technology

PIC18F47J53 FAMILY
27.3.2 CAPACITANCE CALIBRATION
There is a small amount of capacitance from the inter-
nal A/D Converter sample capacitor as well as stray
capacitance from the circuit board traces and pads that
affect the precision of capacitance measurements. A
measurement of the stray capacitance can be taken by
making sure the desired capacitance to be measured
has been removed. The measurement is then
performed using the following steps:
1. Initialize the A/D Converter and the CTMU.
2. Set EDG1STAT (= 1).
3. Wait for a fixed delay of time, t.
4. Clear EDG1STAT.
5. Perform an A/D conversion.
6. Calculate the stray and A/D sample capacitances:
C_OFFSET = C_STRAY + C_AD = I  t  V
where I is known from the current source measurement
step, t is a fixed delay and V is measured by performing
an A/D conversion.
This measured value is then stored and used for
calculations of time measurement or subtracted for
capacitance measurement. For calibration, it is
expected that the capacitance of CSTRAY + CAD is
approximately known. CAD is approximately 4 pF.
An iterative process may need to be used to adjust the
time, t, that the circuit is charged to obtain a reasonable
voltage reading from the A/D Converter. The value of t
may be determined by setting COFFSET to a theoretical
value, then solving for t. For example, if CSTRAY is
theoretically calculated to be 11 pF, and V is expected
to be 70% of VDD or 2.31V, then t would be:
(4 pF + 11 pF) • 2.31V/0.55 A
or 63 s.
See Example 27-3 for a typical routine for CTMU
capacitance calibration.
 2010 Microchip Technology Inc.
Preliminary
DS39964B-page 431