PIC18F47J53 Datasheet, PDF (436/586 Pages) Microchip Technology – 28/44-Pin, High-Performance USB Microcontrollers with nanoWatt XLP Technology

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27.6 Creating a Delay with the CTMU
Module
A unique feature on board the CTMU module is its
ability to generate system clock, independent output
pulses based on an external capacitor value. This is
accomplished using the internal comparator voltage
reference module, Comparator 2 input pin and an
external capacitor. The pulse is output onto the CTPLS
pin. To enable this mode, set the TGEN bit.
See Figure 27-4 for an example circuit. CPULSE is
chosen by the user to determine the output pulse width
on CTPLS. The pulse width is calculated by
T = (CPULSE/I)*V, where I is known from the current
source measurement step (Section 27.3.1 “Current
Source Calibration”) and V is the internal reference
voltage (CVREF).
An example use of this feature is for interfacing with
variable capacitive-based sensors, such as a humidity
sensor. As the humidity varies, the pulse width output
on CTPLS will vary. The CTPLS output pin can be
connected to an input capture pin and the varying pulse
width is measured to determine the humidity in the
application.
Follow these steps to use this feature:
1. Set the CPOL bit (CMxCON<5>).
2. Initialize the comparator voltage reference.
3. Initialize the CTMU and enable time delay
generation by setting the TGEN bit.
4. Set EDG1STAT.
5. When CPULSE charges to the value of the voltage
reference trip point, an output pulse is generated
on CTPLS.
FIGURE 27-4:
TYPICAL CONNECTIONS AND INTERNAL CONFIGURATION FOR PULSE
DELAY GENERATION
CTED1
PIC18F47J53
CTMU
EDG1
CTPLS
C2INB
Current Source
Comparator
C2
CPULSE
CVREF
27.7 Operation During Sleep/Idle
Modes
27.7.1 SLEEP MODE AND DEEP SLEEP
MODES
When the device enters any Sleep mode, the CTMU
module current source is always disabled. If the CTMU
is performing an operation that depends on the current
source when Sleep mode is invoked, the operation may
not terminate correctly. Capacitance and time
measurements may return erroneous values.
27.7.2 IDLE MODE
The behavior of the CTMU in Idle mode is determined
by the CTMUSIDL bit (CTMUCONH<5>). If CTMUSIDL
is cleared, the module will continue to operate in Idle
mode. If CTMUSIDL is set, the module’s current source
is disabled when the device enters Idle mode. In this
case, if the module is performing an operation when
Idle mode is invoked, the results will be similar to those
with Sleep mode.
27.8 Effects of a Reset on CTMU
Upon Reset, all registers of the CTMU are cleared. This
leaves the CTMU module disabled; its current source is
turned off and all configuration options return to their
default settings. The module needs to be re-initialized
following any Reset.
If the CTMU is in the process of taking a measurement at
the time of Reset, the measurement will be lost. A partial
charge may exist on the circuit that was being measured,
and should be properly discharged before the CTMU
makes subsequent attempts to make a measurement.
The circuit is discharged by setting and then clearing the
IDISSEN bit (CTMUCONH<1>) while the A/D Converter
is connected to the appropriate channel.
DS39964B-page 436
Preliminary
 2010 Microchip Technology Inc.