PIC18F47J53 Datasheet, PDF(28/586 Page) Microchip Technology – 28/44-Pin, High-Performance USB Microcontrollers with nanoWatt XLP Technology

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PIC18F47J53 Datasheet, PDF (28/586 Pages) Microchip Technology – 28/44-Pin, High-Performance USB Microcontrollers with nanoWatt XLP Technology

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PIC18F47J53 FAMILY

TABLE 1-4: PIC18F4XJ53 PINOUT I/O DESCRIPTIONS (CONTINUED)

Pin Name

Pin Number

Pin

44- 44- Type

QFN TQFP

Buffer

Type

Description

PORTD is a bidirectional I/O port.

RD0/PMD0/SCL2

RD0

PMD0

SCL2

38(3) 38(3)

I/O ST/DIG

I/O ST/TTL/

DIG

I/O I2C

Digital I/O.

Parallel Master Port data.

I2Câ¢ data input/output.

RD1/PMD1/SDA2

RD1

PMD1

SDA2

39(3) 39(3)

I/O ST/DIG

I/O ST/TTL/

DIG

I/O I2C

Digital I/O.

Parallel Master Port data.

I2C data input/output.

RD2/PMD2/RP19

RD2

PMD2

RP19

40(3) 40(3)

I/O ST/DIG

I/O ST/TTL/

DIG

I/O ST/DIG

Digital I/O.

Parallel Master Port data.

Remappable Peripheral Pin 19 input/output.

RD3/PMD3/RP20

RD3

PMD3

RP20

41(3) 41(3)

I/O ST/DIG

I/O ST/TTL/

DIG

I/O ST/DIG

Digital I/O.

Parallel Master Port data.

Remappable Peripheral Pin 20 input/output.

RD4/PMD4/RP21

RD4

PMD4

RP21

2(3) 2(3)

I/O ST/DIG

I/O ST/TTL/

DIG

I/O ST/DIG

Digital I/O.

Parallel Master Port data.

Remappable Peripheral Pin 21 input/output.

RD5/PMD5/RP22

RD5

PMD5

RP22

3(3) 3(3)

I/O ST/DIG

I/O ST/TTL/

DIG

I/O ST/DIG

Digital I/O.

Parallel Master Port data.

Remappable Peripheral Pin 22 input/output.

RD6/PMD6/RP23

RD6

PMD6

RP23

4(3) 4(3)

I/O ST/DIG

I/O ST/TTL/

DIG

I/O ST/DIG

Digital I/O.

Parallel Master Port data.

Remappable Peripheral Pin 23 input/output.

RD7/PMD7/RP24

RD7

PMD7

RP24

5(3) 5(3)

I/O ST/DIG

I/O ST/TTL/

DIG

I/O ST/DIG

Digital I/O.

Parallel Master Port data.

Remappable Peripheral Pin 24 input/output.

Legend:

TTL = TTL compatible input

ST = Schmitt Trigger input with CMOS levels

I = Input

P = Power

DIG = Digital output

CMOS

Analog

O

OD

I2Câ¢

= CMOS compatible input or output

= Analog input

= Output

= Open-Drain (no P diode to VDD)

= Open-Drain, I2C specific

Note 1: RA7 and RA6 will be disabled if OSC1 and OSC2 are used for the clock function.

2: Available only on 44-pin devices (PIC18F46J53, PIC18F47J53, PIC18LF46J53 and PIC18LF47J53).

3: 5.5V tolerant.

DS39964B-page 28

Preliminary

ï£ 2010 Microchip Technology Inc.

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