PIC18F47J53 Datasheet, PDF (313/586 Pages) Microchip Technology – 28/44-Pin, High-Performance USB Microcontrollers with nanoWatt XLP Technology

PIC18F47J53 FAMILY
REGISTER 20-7: SSPxCON2: MSSPx CONTROL REGISTER 2 (I²C™ MASTER MODE)
(1, ACCESS FC5h; 2, F71h)
R/W-0
GCEN⁽³⁾
bit 7
R/W-0
ACKSTAT
R/W-0
ACKDT⁽¹⁾
R/W-0
ACKEN⁽²⁾
R/W-0
RCEN⁽²⁾
R/W-0
PEN⁽²⁾
R/W-0
RSEN⁽²⁾
R/W-0
SEN⁽²⁾
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
GCEN: General Call Enable bit (Slave mode only)⁽³⁾
1 = Enable interrupt when a general call address (0000h) is received in the SSPxSR
0 = General call address disabled
bit 6
ACKSTAT: Acknowledge Status bit (Master Transmit mode only)
1 = Acknowledge was not received from slave
0 = Acknowledge was received from slave
bit 5
ACKDT: Acknowledge Data bit (Master Receive mode only)⁽¹⁾
1 = Not Acknowledge
0 = Acknowledge
bit 4
ACKEN: Acknowledge Sequence Enable bit⁽²⁾
1 = Initiates Acknowledge sequence on SDAx and SCLx pins, and transmits ACKDT data bit;
automatically cleared by hardware
0 = Acknowledge sequence Idle
bit 3
RCEN: Receive Enable bit (Master Receive mode only)⁽²⁾
1 = Enables Receive mode for I²C
0 = Receive Idle
bit 2
PEN: Stop Condition Enable bit⁽²⁾
1 = Initiates Stop condition on SDAx and SCLx pins; automatically cleared by hardware
0 = Stop condition Idle
bit 1
RSEN: Repeated Start Condition Enable bit⁽²⁾
1 = Initiates Repeated Start condition on SDAx and SCLx pins; automatically cleared by hardware
0 = Repeated Start condition Idle
bit 0
SEN: Start Condition Enable bit⁽²⁾
1 = Initiates Start condition on SDAx and SCLx pins; automatically cleared by hardware
0 = Start condition Idle
Note 1:
2:
3:
Value that will be transmitted when the user initiates an Acknowledge sequence at the end of a receive.
If the I²C module is active, these bits may not be set (no spooling) and the SSPxBUF may not be written
(or writes to the SSPxBUF are disabled).
This bit is not implemented in I²C Master mode.
 2010 Microchip Technology Inc.
Preliminary
DS39964B-page 313