PIC18F47J53 Datasheet, PDF (447/586 Pages) Microchip Technology – 28/44-Pin, High-Performance USB Microcontrollers with nanoWatt XLP Technology

PIC18F47J53 FAMILY
REGISTER 28-5: CONFIG3L: CONFIGURATION REGISTER 3 LOW (BYTE ADDRESS 300004h)
R/WO-1
R/WO-1
R/WO-1
R/WO-1
R/WO-1
R/WO-1 R/WO-1
R/WO-1
DSWDTPS3⁽¹⁾ DSWDTPS2⁽¹⁾ DSWDTPS1⁽¹⁾ DSWDTPS0⁽¹⁾ DSWDTEN⁽¹⁾ DSBOREN RTCOSC DSWDTOSC⁽¹⁾
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
WO = Write-Once bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-4
bit 3
bit 2
bit 1
bit 0
DSWDTPS<3:0>: Deep Sleep Watchdog Timer Postscale Select bits⁽¹⁾
The DSWDT prescaler is 32. This creates an approximate base time unit of 1 ms.
1111 = 1:2,147,483,648 (25.7 days)
1110 = 1:536,870,912 (6.4 days)
1101 = 1:134,217,728 (38.5 hours)
1100 = 1:33,554,432 (9.6 hours)
1011 = 1:8,388,608 (2.4 hours)
1010 = 1:2,097,152 (36 minutes)
1001 = 1:524,288 (9 minutes)
1000 = 1:131,072 (135 seconds)
0111 = 1:32,768 (34 seconds)
0110 = 1:8,192 (8.5 seconds)
0101 = 1:2,048 (2.1 seconds)
0100 = 1:512 (528 ms)
0011 = 1:128 (132 ms)
0010 = 1:32 (33 ms)
0001 = 1:8 (8.3 ms)
0000 = 1:2 (2.1 ms)
DSWDTEN: Deep Sleep Watchdog Timer Enable bit⁽¹⁾
1 = DSWDT is enabled
0 = DSWDT is disabled
DSBOREN: “F” Device Deep Sleep BOR Enable bit, “LF” Device VDD BOR Enable bit
For “F” Devices:
1 = VDD sensing BOR is enabled in Deep Sleep
0 = VDD sensing BOR circuit is always disabled
For “LF” Devices:
1 = VDD sensing BOR circuit is always enabled
0 = VDD sensing BOR circuit is always disabled
RTCOSC: RTCC Reference Clock Select bit
1 = RTCC uses T1OSC/T1CKI as reference clock
0 = RTCC uses INTRC as the reference clock
DSWDTOSC: DSWDT Reference Clock Select bit⁽¹⁾
1 = DSWDT uses INTRC as the reference clock
0 = DSWDT uses T1OSC/T1CKI as reference clock
Note 1: Functions are not available on “LF” devices.
 2010 Microchip Technology Inc.
Preliminary
DS39964B-page 447