PIC18F47J53 Datasheet, PDF (73/586 Pages) Microchip Technology – 28/44-Pin, High-Performance USB Microcontrollers with nanoWatt XLP Technology

PIC18F47J53 FAMILY
TABLE 5-2: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Applicable Devices
Power-on Reset,
Brown-out Reset,
Wake From Deep
Sleep
MCLR Resets
WDT Reset
RESET Instruction
Stack Resets
CM Resets
Wake-up via WDT
or Interrupt
PSTR1CON PIC18F2XJ53 PIC18F4XJ53
00-0 0001
00-0 0001
uu-u uuuu
ECCP1AS
PIC18F2XJ53 PIC18F4XJ53
0000 0000
0000 0000
uuuu uuuu
ECCP1DEL PIC18F2XJ53 PIC18F4XJ53
0000 0000
0000 0000
uuuu uuuu
CCPR1H
PIC18F2XJ53 PIC18F4XJ53
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCPR1L
PIC18F2XJ53 PIC18F4XJ53
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCP1CON
PIC18F2XJ53 PIC18F4XJ53
0000 0000
0000 0000
uuuu uuuu
PSTR2CON PIC18F2XJ53 PIC18F4XJ53
00-0 0001
00-0 0001
uu-u uuuu
ECCP2AS
PIC18F2XJ53 PIC18F4XJ53
0000 0000
0000 0000
uuuu uuuu
ECCP2DEL PIC18F2XJ53 PIC18F4XJ53
0000 0000
0000 0000
uuuu uuuu
CCPR2H
PIC18F2XJ53 PIC18F4XJ53
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCPR2L
PIC18F2XJ53 PIC18F4XJ53
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCP2CON
PIC18F2XJ53 PIC18F4XJ53
0000 0000
0000 0000
uuuu uuuu
CTMUCONH PIC18F2XJ53 PIC18F4XJ53
0-00 000-
0-00 000-
u-uu uuu-
CTMUCONL PIC18F2XJ53 PIC18F4XJ53
0000 00xx
0000 00xx
uuuu uuuu
CTMUICON PIC18F2XJ53 PIC18F4XJ53
0000 0000
0000 0000
uuuu uuuu
SPBRG1
PIC18F2XJ53 PIC18F4XJ53
0000 0000
0000 0000
uuuu uuuu
RCREG1
PIC18F2XJ53 PIC18F4XJ53
0000 0000
0000 0000
uuuu uuuu
TXREG1
PIC18F2XJ53 PIC18F4XJ53
xxxx xxxx
uuuu uuuu
uuuu uuuu
TXSTA1
PIC18F2XJ53 PIC18F4XJ53
0000 0010
0000 0010
uuuu uuuu
RCSTA1
PIC18F2XJ53 PIC18F4XJ53
0000 000x
0000 000x
uuuu uuuu
SPBRG2
PIC18F2XJ53 PIC18F4XJ53
0000 0000
0000 0000
uuuu uuuu
RCREG2
PIC18F2XJ53 PIC18F4XJ53
0000 0000
0000 0000
uuuu uuuu
TXREG2
PIC18F2XJ53 PIC18F4XJ53
0000 0000
0000 0000
uuuu uuuu
TXSTA2
PIC18F2XJ53 PIC18F4XJ53
0000 0010
0000 0010
uuuu uuuu
EECON2
PIC18F2XJ53 PIC18F4XJ53
---- ----
---- ----
---- ----
EECON1
PIC18F2XJ53 PIC18F4XJ53
--00 x00-
--00 u00-
--00 u00-
IPR3
PIR3
PIC18F2XJ53 PIC18F4XJ53
PIC18F2XJ53 PIC18F4XJ53
1111 1111
0000 0000
1111 1111
0000 0000
uuuu uuuu
uuuu uuuu⁽³⁾
PIE3
PIC18F2XJ53 PIC18F4XJ53
0000 0000
0000 0000
uuuu uuuu
IPR2
PIR2
PIC18F2XJ53 PIC18F4XJ53
PIC18F2XJ53 PIC18F4XJ53
1111 1111
0000 0000
1111 1111
0000 0000
uuuu uuuu
uuuu uuuu⁽³⁾
PIE2
PIC18F2XJ53 PIC18F4XJ53
0000 0000
0000 0000
uuuu uuuu
Legend:
Note 1:
u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
3: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
4: See Table 5-1 for Reset value for specific condition.
5: Not implemented for PIC18F2XJ53 devices.
6: Not implemented for “LF” devices.
 2010 Microchip Technology Inc.
Preliminary
DS39964B-page 73