PIC18F47J53 Datasheet, PDF (84/586 Pages) Microchip Technology – 28/44-Pin, High-Performance USB Microcontrollers with nanoWatt XLP Technology

PIC18F47J53 FAMILY
6.1.4.2 Return Stack Pointer (STKPTR)
The STKPTR register (Register 6-1) contains the Stack
Pointer value, the STKFUL (Stack Full) and the STKUNF
(Stack Underflow) status bits. The value of the Stack
Pointer can be 0 through 31. The Stack Pointer
increments before values are pushed onto the stack and
decrements after values are popped off of the stack. On
Reset, the Stack Pointer value will be zero. The user
may read and write the Stack Pointer value. This feature
can be used by a Real-Time Operating System (RTOS)
for return stack maintenance.
After the PC is pushed onto the stack 31 times (without
popping any values off the stack), the STKFUL bit is
set. The STKFUL bit is cleared by software or by a
Power-on Reset (POR).
The action that takes place when the stack becomes
full depends on the state of the Stack Overflow Reset
Enable (STVREN) Configuration bit.
Refer to Section 28.1 “Configuration Bits” for device
Configuration bits’ description.
If STVREN is set (default), the 31^st push will push the
(PC + 2) value onto the stack, set the STKFUL bit and
reset the device. The STKFUL bit will remain set and
the Stack Pointer will be set to zero.
If STVREN is cleared, the STKFUL bit will be set on the
31^st push and the Stack Pointer will increment to 31.
Any additional pushes will not overwrite the 31^st push
and the STKPTR will remain at 31.
When the stack has been popped enough times to
unload the stack, the next pop will return zero to the PC
and set the STKUNF bit, while the Stack Pointer
remains at zero. The STKUNF bit will remain set until
cleared by software or until a POR occurs.
Note:
Returning a value of zero to the PC on an
underflow has the effect of vectoring the
program to the Reset vector, where the
stack conditions can be verified and
appropriate actions can be taken. This is
not the same as a Reset, as the contents
of the SFRs are not affected.
6.1.4.3 PUSH and POP Instructions
Since the Top-of-Stack (TOS) is readable and writable,
the ability to push values onto the stack and pull values
off of the stack, without disturbing normal program exe-
cution, is necessary. The PIC18 instruction set includes
two instructions, PUSH and POP, that permit the TOS to
be manipulated under software control. TOSU, TOSH
and TOSL can be modified to place data or a return
address on the stack.
The PUSH instruction places the current PC value onto
the stack. This increments the Stack Pointer and loads
the current PC value onto the stack.
The POP instruction discards the current TOS by
decrementing the Stack Pointer. The previous value
pushed onto the stack then becomes the TOS value.
REGISTER 6-1: STKPTR: STACK POINTER REGISTER (ACCESS FFCh)
R/C-0
R/C-0
U-0
STKFUL⁽¹⁾ STKUNF⁽¹⁾
—
bit 7
R/W-0
SP4
R/W-0
SP3
R/W-0
SP2
R/W-0
SP1
R/W-0
SP0
bit 0
Legend:
R = Readable bit
-n = Value at POR
C = Clearable bit
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
bit 6
bit 5
bit 4-0
STKFUL: Stack Full Flag bit⁽¹⁾
1 = Stack became full or overflowed
0 = Stack has not become full or overflowed
STKUNF: Stack Underflow Flag bit⁽¹⁾
1 = Stack underflow occurred
0 = Stack underflow did not occur
Unimplemented: Read as ‘0’
SP<4:0>: Stack Pointer Location bits
Note 1: Bits 7 and 6 are cleared by user software or by a POR.
DS39964B-page 84
Preliminary
 2010 Microchip Technology Inc.