MC9S12KG128 Datasheet, PDF (85/600 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 2 128 Kbyte ECC Flash Module (FTS128K1ECCV1)
2.3.2.3 Flash Test Mode Register (FTSTMOD)
The FTSTMOD register is used to control Flash test features.
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
FDFD
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 2-6. Flash Test Mode Register (FTSTMOD)
FDFD is readable and writable while all remaining bits read 0 and are not writable in normal mode.
Field
3
FDFD
Table 2-8. FTSTMOD Field Descriptions
Description
Force Double Fault Detect — The FDFD bit allows the user to simulate a double bit fault during Flash array
read operations and check the associated interrupt routine. The FDFD bit is cleared by writing a 0 to FDFD.
0 Flash array read operations will set the DFDIF flag in the FSTAT register only if a double bit fault is detected.
1 Any Flash array read operation will force the DFDIF flag in the FSTAT register to be set and an interrupt will
be generated as long as the DFDIE interrupt enable in the FCNFG register is set.
2.3.2.4 Flash Configuration Register (FCNFG)
The FCNFG register enables the Flash interrupts and gates the security backdoor writes.
R
W
Reset
7
CBEIE
0
6
5
4
3
2
0
0
0
CCIE
KEYACC
0
0
0
0
0
= Unimplemented or Reserved
Figure 2-7. Flash Configuration Register (FCNFG)
1
0
BKSEL
0
0
CBEIE, CCIE, KEYACC and DFDIE bits are readable and writable while all remaining bits read 0 and
are not writable. KEYACC is only writable if KEYEN (see Section 2.3.2.2) is set to the enabled state.
MC9S12KG128 Data Sheet, Rev. 1.15
Freescale Semiconductor
85