MC9S12KG128 Datasheet, PDF (19/600 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 1
MC9S12KG128 Device Overview (MC9S12KG128V1)
1.1 Introduction
The MC9S12KG128 is a 112/80 pin 16-bit Flash-based microcontroller family targeted for high reliability
systems. The MC9S12KG128 has an increased performance in reliability over the life of the product due
to a built-in Error Checking and Correction Code (ECC) in the Flash memory. The program and erase
operations automatically generate six parity bits per word making ECC transparent to the user.
The MC9S12KG128 is comprised of standard on-chip peripherals including a 16-bit central processing
unit (CPU12), 128K bytes of Flash EEPROM, 2K bytes of EEPROM, 8K bytes of RAM, two
asynchronous serial communications interface (SCI), three serial peripheral interface (SPI), IIC-bus, an
8-channel IC/OC timer, one 16-channel 10-bit analog-to-digital converter (ADC), an 8-channel
pulse-width modulator (PWM), two CAN 2.0 A, B software compatible modules, 29 discrete digital I/O
channels (Port A, Port B, Port E and Port K), and 20 discrete digital I/O lines with interrupt and wakeup
capability. The MC9S12KG128 has full 16-bit data paths throughout, however, the external bus can
operate in an 8-bit narrow mode so single 8-bit wide memory can be interfaced for lower cost systems. The
inclusion of a PLL circuit allows power consumption and performance to be adjusted to suit operational
requirements.
1.1.1 Features
• HCS12 Core
— 16-bit HCS12 CPU
– Upward compatible with M68HC11 instruction set
– Interrupt stacking and programmer’s model identical to M68HC11
– Instruction queue
– Enhanced indexed addressing
— MEBI (Multiplexed External Bus Interface)
— MMC (Memory Map and Interface)
— INT (Interrupt Controller)
— DBG (Debugger)
— BDM (Background Debug Mode)
• Oscillator
— 4MHz to 16MHz frequency range
— Pierce with amplitude loop control
— Clock monitor
MC9S12KG128 Data Sheet, Rev. 1.15
Freescale Semiconductor
19