MC9S12KG128 Datasheet, PDF (452/600 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 15 Background Debug Module (BDMV4)
PLLSEL
1
1
CLKSW
0
1
Table 15-3. BDM Clock Sources
BDMCLK
Alternate clock (refer to the device overview chapter to determine the alternate clock
source)
Bus clock dependent on the PLL
MC9S12KG128 Data Sheet, Rev. 1.15
452
Freescale Semiconductor