MC9S12KG128 Datasheet, PDF (164/600 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 4 Port Integration Module (PIM9KG128V1)
4.3.5.3 Port H Data Direction Register (DDRH)
Module Base + 0x0022
R
W
Reset
7
DDRH7
0
6
DDRH6
0
5
DDRH5
0
4
DDRH4
0
3
DDRH3
0
2
DDRH2
0
Figure 4-33. Port H Data Direction Register (DDRH)
Read: Anytime. Write: Anytime.
This register configures each port H pin as either input or output.
Table 4-30. DDRH Field Descriptions
Field
7–0
Data Direction Port H
DDRH]7:0] 0 Associated pin is configured as input.
1 Associated pin is configured as output.
Description
1
DDRH1
0
0
DDRH0
0
4.3.5.4 Port H Reduced Drive Register (RDRH)
Module Base + 0x0023
7
R
RDRH7
W
6
RDRH6
5
RDRH5
4
RDRH4
3
RDRH3
2
RDRH2
Reset
0
0
0
0
0
0
Figure 4-34. Port H Reduced Drive Register (RDRH)
Read: Anytime. Write: Anytime.
1
RDRH1
0
0
RDRH0
0
This register configures the drive strength of each port H output pin as either full or reduced. If the port is
used as input this bit is ignored.
Table 4-31. RDRH Field Descriptions
Field
Description
7–0
Reduced Drive Port H
RDRH[7:0] 0 Full drive strength at output.
1 Associated pin drives at about 1/6 of the full drive strength.
MC9S12KG128 Data Sheet, Rev. 1.15
164
Freescale Semiconductor